Ocean Optics Flame-S - Page 88

8: Firmware and Advanced Communications
78 225-00000-000-11-201604
Register
Address
Description
Default
Value
Min
Value
Max
Value
Time Base
0x2C
&*
Trigger Mode
0 = Free Running
1 = External Hardware Level Trigger
1 = External Synchronization Trigger
3 = External Hardware Edge Trigger
0
0
4
N/A
0x30
Reserved
0x38
Single Strobe High Clock Transition Delay
Count
1
0
0xFFFF
2MHz
0x3C
Single Strobe Low Clock Transition Delay
Count
5
0
0xFFFF
2MHz
0x40
Lamp Enable
0
0
1
N/A
0x48
GPIO Mux Register
0: pin is GPIO pin
1: pin is alternate function
0
0
0x03FF
N/A
0x50
GPIO Output Enable
1: pin is output
0: pin is input
0
0
0x03FF
N/A
0x54
GPIO Data Register
For Output: Write value of signal
For Input: Read current GPIO state
0
0
0x03FF
N/A
0x58
Reserved
0x5C
Offset Value
0
0
0xFFFF
N/A
0x60
Offset Control
Bit 0 = Enable Auto-Nulling
Bit 1 = Enable Auto-Nulling Saturation
0
0
0xFFFF
N/A
0x64
FPGA Programmed (Read Only)
0x5501
N/A
N/A
N/A
0x68
Maximum Saturation Level
0x55F0
0
0xFFFF
N/A