Omron CJ1M-CPU22

14
Allocations for Built-in CPU Unit Inputs Section 2-1
4) High-speed
counter inputs
(2 inputs max.)
Gate (stop
count) function
The CPU Unit's built-in inputs can be
used as high-speed counters. (High-
speed counter 0 uses bits 03, 08, 09 of
CIO 2960 and high-speed counter 1
uses bits 02, 06, 07 of CIO 2960.)
• Differential phase input
(4x multiplication)
30 kHz (50 kHz)
• Pulse + direction input
60 kHz (100 kHz)
• Up/down pulse input
60 kHz (100 kHz)
• Increment input
60 kHz (100 kHz)
Note 1: The first figures are the max. fre-
quencies for 24-V DC inputs and the fig-
ures in parentheses are for line driver
inputs.
Note 2: The phase-Z input for high-
speed counters 0 and 1 cannot be used
if the origin search function for pulse out-
put 1 is being used.
The status of the high-speed counter PV
can be controlled (maintained or
refreshed) with the High-speed Counter
Gate Bits (A53108 and A53109).
Target value
comparison
interrupt
An interrupt task (any task from 0 to 255)
can be started when the high-speed
counter's PV matches the set value
specified by the CTBL(882) instruction.
Range com-
parison inter-
rupt
An interrupt task (any task from 0 to 255)
can be started when the high-speed
counter's PV is within the range speci-
fied by the CTBL(882) instruction.
Frequency
(speed) mea-
surement func-
tion
The high-speed counter's frequency
(speed) can be measured by executing
the PRV(881) instruction. (High-speed
counter 0 only)
• Measurement range with Differential
phase input mode:
0 to 50 kHz
• Measurement range with all other
input modes:
0 to 100 kHz
Frequency
conversion
PRV2(883) read the pulse frequency
and converts it to a rotational speed (r/
min) or it converts the counter PV to a
total number of rotations. Results are
calculated by the number of pulses/rota-
tion. (High-speed counter 0 only)
Item Specifications