80
Instruction Treatment
OUT and OUT NOT Designated bit turned OFF.
TIM, TIMM(20), TIMH(21), ATIM(22),
ATM1(25), and ATM2(26)
Reset.
CNT, RDM(23), and CNTH(24) Frozen and PV maintained.
KEEP(12) Bit status maintained.
DIFU(10) and DIFD(11) Not executed (see below).
All others Not executed.
IL(02) and ILC(03) do not necessarily have to be used in pairs. IL(02) can be
used several times in a row, with each IL(02) creating an interlocked section
through the next ILC(03). ILC(03) cannot be used unless there is at least one
IL(02) between it and any previous ILC(03).
Changes in the execution condition for a DIFU(10) or DIFD(11) are not re-
corded if the DIFU(10) or DIFD(11) is in an interlocked section and the ex-
ecution condition for the IL(02) is OFF. When DIFU(10) or DIFD(11) is execu-
tion in an interlocked section immediately after the execution condition for the
IL(02) has gone ON, the execution condition for the DIFU(10) or DIFD(11)
will be compared to the execution condition that existed before the interlock
became effective (i.e., before the interlock condition for IL(02) went OFF).
The ladder diagram and bit status changes for this are shown below. The
interlock is in effect while bit 0000 is OFF. Notice that bit 0215 is not turned
ON at the point labeled A even though 0001 has turned OFF and then back
ON.
0000
IL(02)
DIFU(10) 0215
ILC(03)
0001
0000
0001
ON
OFF
ON
OFF
0215
ON
OFF
A
Address Instruction Operands
000 LD 0000
001 IL(02)
002 LD 0001
003 DIFU(10) 0215
004 ILC(03)
There must be an ILC(03) following any one or more IL(02).
Although as many IL(02) instructions as necessary can be used with one
ILC(03), ILC(03) instructions cannot be used consecutively without at least
one IL(02) in between. Whenever a ILC(03) is executed, all interlocks be-
tween the active ILC(03) and the preceding ILC(03) are cleared.
STEP(04) and SNXT(05) cannot be used between the INTERLOCK and IN-
TERLOCK CLEAR instructions.
There are no flags affected by these instructions.
DIFU(10) and DIFD(11) in
Interlocks
Precautions
Flags
Instruction Set Section 3-7
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