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Panasonic SA-PM28E - Schematic Diagram - 2 (Continued)

Panasonic SA-PM28E
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IC702
MN6627931BD
SERVO PROCESSOR/
DIGITAL SIGNAL
PROCESSOR/
DIGITAL FILTER/
D/A CONVERTER
IC704
C3ABMB000027
16M DRAM
A
RF
CDRST
MDATA
MCLK
MLD
STAT
MDATA
MCLK
MLD
STAT
NRST
NTEST
PMCK
SMCK
OUTX2
INX1
AVSS2
AVDD2
PLLFO
PLLF
DLSF
IREF
RFSW
ARF
BLKCK
B
B
JK300
OPTICAL
B
LDON
FBAL
TBAL
FOM
TRP
TRM
FOP
TRVP
TRVM
SPOUT
NWE
NRAS
NCAS0
SBCK
DQSY
TXTD
TXTCK
FLAG
A0~10
D0~3
EXT0
EXT2
EXT1
TX
AVSS1
AVDD1
OUTR
OUTL
ADPVCC
FE
TE
RFENV
OFT
NRFDET
BDO
PWMSEL
SPPOL
DVSS1~3
B
B
TO MAIN BLOCK
B
B
A0~10
D0~3
9~19
8~12,
15~19,21
2,3,
6,7
38
2,3,
24,25
/WE
/RAS
/CAS
4
5
23
DRVDD
BLKCK
4
5
8
1
TMOD2
54
IOVDD1
29
64
67
72
5573
74
39
40
42
44
45
46
47
69
62
61
63
68
75
76
X701
77
78,20,
52
DVDD1~3
79,21,
41
32
33
34
35
36
37
65
70
53
71
66
31
30
28
25
26
60
27
23
24
49
57
56
58
51
50
48
22
REGULATOR
IOVDD2
59
DRAM
INTERFACE
CTRL
RAM
DSL, PLL, VCO
EFM DEMODULATION
SYNC INTERPOLATION
CTRC EOC
CDROM EOC
BUS CONTROL
UNIT
(BCU)
ADPCM
SERIAL OUTPUT
INTERFACE
TIMING
GENERATOR
SPINDLE
SERVO
SPINDLE
CPU
MICROCOMPUTER
INTERFACE
MP3/WMA
DECODER
FS
CONVERTER
DIGITAL FILTER
1bit DAC
PWM LOGIC
ANALOG
LOWPASS
FILTER
DIGITAL OUT
OUTPUT PORT
INPUT
PORT
A/D
CONVERTER
SUBCODE
INTERFACE
43
LDON
FBAL
TBAL
FOM
TRP
FOP
TRVP
TRVM
SPOUT
FE
TE
ENV
OFTR
/RFDET
BDO
TX
TX
RCH
CD SIGNAL

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