GVI Product Manual: Frames C, D & E
56 192-300300N1 GVI Frames C, D & E 2019-9
13.4.4. Encoder input
Refer to Figure 20.
Analog to digital converter connection
12 bit ADC, input range 0-5 V
Input impedance (pull-down)
Internal pull-up to +5V (SW controlled)
Input capacitance (ESD protection)
13.4.5. Open drain output
Refer to Figure 21.
Open drain output continuous (hold) current
1 A (Open drain 4, 5, 6)
Open drain output peak (pull) current (max 200ms)
2 A (Open drain 4, 5, 6)
PWM frequency setting interval
Current measurement and control
0 – 5.4 A with 12 bit resolution (Open drain 1, 2, 3)
0 – 2.7 A with 12 bit resolution (Open drain 4, 5, 6)
Dithering current amplitude
up to 20% of reference value
Recommended PWM Duty cycle for closed loop current
control
Capacitor (B-) for ESD protection
13.4.6. High side in and out
Refer to Figure 23.
High_side minimum input voltage
High side switch maximum output current
Maximum allowable ripple current
Capacitor for ESD protection