PDP-436SXE
158
1234
1234
C
D
F
A
B
E
No. Pin Name I/O Pin Function
101 RSVDL I Reserved, must be tied LOW
102 RESET# I Reset pin, active LOW
103 SCDT O Indicates active video at HDMI input port
104 INT O Interrupt output
105 CVCC18 – Digital logic VCC
106 CGND – Digital logic ground
107 CLK48B I/O Data bus latch enable
108 IOGND – Input / output pin ground
109 IOVCC – Input / output pin VCC
110 Q23 O 24-bit output pixel data bus
111 Q22 O 24-bit output pixel data bus
112 Q21 O 24-bit output pixel data bus
113 Q20 O 24-bit output pixel data bus
114 CVCC18 – Digital logic VCC
115 CGND – Digital logic ground
116 Q19 O 24-bit output pixel data bus
117 Q18 O 24-bit output pixel data bus
118 Q17 O 24-bit output pixel data bus
119 Q16 O 24-bit output pixel data bus
120 IOGND – Input / output pin ground
121 ODCK O Output data clock
122 IOVCC – Input / output pin VCC
123 Q15 O 24-bit output pixel data bus
124 Q14 O 24-bit output pixel data bus
125 Q13 O 24-bit output pixel data bus
126 Q12 O 24-bit output pixel data bus
127 CGND – Digital logic ground
128 CVCC18 – Digital logic VCC
129 Q11 O 24-bit output pixel data bus
130 Q10 O 24-bit output pixel data bus
131 Q9 O 24-bit output pixel data bus
132 Q8 O 24-bit output pixel data bus
133 Q7 O 24-bit output pixel data bus
134 IOVCC – Input / output pin VCC
135 IOGND – Input / output pin ground
136 Q6 O 24-bit output pixel data bus
137 Q5 O 24-bit output pixel data bus
138 CGND – Digital logic ground
139 CVCC18 – Digital logic VCC
140 Q4 O 24-bit output pixel data bus
141 Q3 O 24-bit output pixel data bus
142 Q2 O 24-bit output pixel data bus
143 Q1 O 24-bit output pixel data bus
144 Q0 O 24-bit output pixel data bus