Quectel LTE-A Series - Page 8

LTE-A Module Series
EG060V-EA Hardware Design
EG060V-EA_Hardware_Design 7 / 82
Figure Index
Figure 1: Functional Diagram ..................................................................................................................... 14
Figure 2: Pin Assignment (Top View) ........................................................................................................ 17
Figure 3: DRX Run Time and Current Consumption in Sleep Mode ......................................................... 27
Figure 4: Set Sleep Mode via UART .......................................................................................................... 28
Figure 5: Sleep Mode with Remote Wakeup ............................................................................................. 29
Figure 6: Sleep Mode with RI Signal Wakeup ........................................................................................... 29
Figure 7: Sleep Mode without Suspend Function ...................................................................................... 30
Figure 8: Voltage Drop Limits during Tx .................................................................................................... 32
Figure 9: Star Structure of Power Supply .................................................................................................. 33
Figure 10: Reference Design of Power Supply .......................................................................................... 33
Figure 11: Turn on the Module with Driving Circuit.................................................................................... 34
Figure 12: Turn on the Module with Button ................................................................................................ 35
Figure 13: Timing of Turning on the Module .............................................................................................. 35
Figure 14: Timing of Turning off the Module .............................................................................................. 36
Figure 15: Resetting the Module with Driving Circuit ................................................................................. 37
Figure 16: Resetting the Module with Button ............................................................................................. 37
Figure 17: Timing of Resetting the Module ................................................................................................ 38
Figure 18: Reference Design of (U)SIM Interface with 8-Pin (U)SIM Card Connector ............................. 39
Figure 19: Reference Design of (U)SIM Interface with 6-Pin (U)SIM Card Connector ............................. 39
Figure 20: Reference Design of USB Interface ......................................................................................... 41
Figure 21: Reference Design of Translator Chip ....................................................................................... 43
Figure 22: Reference Design of Transistor Circuit ..................................................................................... 44
Figure 23: Primary Mode Timing ................................................................................................................ 45
Figure 24: Reference Design of PCM Interface with Audio Codec ........................................................... 46
Figure 25: Reference Design of Network Indicator .................................................................................... 48
Figure 26: Reference Design of STATUS .................................................................................................. 49
Figure 27: Reference Design of SD Card Interface ................................................................................... 53
Figure 28: SPI Interface Timing ................................................................................................................. 54
Figure 29: Reference Design of SPI Interface with Level Translator ........................................................ 55
Figure 30: Reference Design of USB_BOOT Interface ............................................................................. 56
Figure 31: Reference Design of RF Antenna Interface ............................................................................. 58
Figure 32: Reference Design of Microstrip on 2-layer PCB ....................................................................... 59
Figure 33: Reference Design of Coplanar Waveguide on 2-layer PCB .................................................... 59
Figure 34: Reference Design of Coplanar Waveguide on 4-layer PCB (Layer 3 as Reference Ground) . 59
Figure 35: Reference Design of Coplanar Waveguide on 4-layer PCB (Layer 4 as Reference Ground) . 60
Figure 36: Dimensions of U.FL-R-SMT Connector (Unit: mm) .................................................................. 61
Figure 37: Mechanical Features of U.FL-LP Connectors .......................................................................... 62
Figure 38: Form Factor of Mated Connectors (Unit: mm) .......................................................................... 62
Figure 39: Reference Design of Heatsink (Heatsink at the Top of the Module) ........................................ 70
Figure 40: Reference Design of Heatsink (Heatsink at the Backside of PCB) .......................................... 70
Figure 41: Top and Side Dimensions of the Module ................................................................................. 72