Automotive Module Series
AG525R-GL QuecOpen
Hardware Design
AG525R-GL_QuecOpen_Hardware_Design 34 / 104
1. Keep all RESERVED pins and unused pins unconnected.
2. GND pins should be connected to ground in the design.
WLAN_PWR_
EN2
225 DO
WLAN power supply
enable control 2
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
If unused, keep
them open.
1.8 V power domain.
If unused, keep
them open.
WLAN_PWR_
EN1
222 DO
WLAN power supply
enable control 1
V
OL
max = 0.45 V
V
OH
min = 1.35 V
WLAN_EN 228 DO WLAN enable
V
OL
max = 0.45 V
V
OH
min = 1.35 V
COEX_UART_
RXD
67 DI
LTE&WLAN/BT
coexistence receive
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
COEX_UART_
TXD
69 DO
LTE&WLAN/BT
coexistence
transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
WLAN_SLP_
CLK
231 DO WLAN sleep clock
V
OL
max = 0.45 V
V
OH
min = 1.35 V
RF Antenna Interfaces
Pin Name Pin No. I/O Description
DC
Characteristics
Comment
ANT_MAIN 143
AI/
AO
Main antenna
interface
50 Ω impedance.
ANT_DIV 170 AI
Diversity antenna
interface
RESERVED Pins
Pin Name Pin No. Comment
RESERVED
1-6, 9, 35, 37, 41, 43, 57, 64, 65, 82, 89, 94, 96, 97, 99, 113,
119, 122, 123, 132, 136, 142, 152, 154, 157, 161, 163, 166,
175, 178, 179, 184, 188, 190, 193, 196, 197, 200, 204, 205,
207, 214, 223, 224, 226, 227, 229, 235, 236, 238, 239, 252,
266, 268–275, 278–288, 290–306
Keep these pins
open.
NOTES
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