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Quectel QuecOpen AG525R-GL

Quectel QuecOpen AG525R-GL
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Automotive Module Series
AG525R-GL QuecOpen
Hardware Design
AG525R-GL_QuecOpen_Hardware_Design 58 / 104
The module works as a master device pertaining to I2C interface.
3.13. SDIO Interface
The module provides an SDIO interface. It is recommended to use the interface for eMMC application.
Table 19: Pin Definition of SDIO Interface
Pin Name Pin No. I/O Description Comment
SDIO_VDD 60 PI SDIO power supply Connect it to VDD_EXT.
SDC1_DATA_0 49 IO SDIO data bit 0
1.8 V power domain for eMMC.
SDC1_DATA_1 50 IO SDIO data bit 1
SDC1_DATA_2 51 IO SDIO data bit 2
SDC1_DATA_3 52 IO SDIO data bit 3
SDC1_CMD 48 IO SDIO command
SDC1_DATA_4 53 IO SDIO data bit 4
1.8 V power domain.
For eMMC configuration by default.
Can be configured to GPIO.
SDC1_DATA_5 55 IO SDIO data bit 5
SDC1_DATA_6 56 IO SDIO data bit 6
SDC1_DATA_7 58 IO SDIO data bit 7
SDC1_CLK 47 DO SDIO clock 1.8 V power domain for eMMC.
EMMC_RST 54 DO eMMC reset
1.8 V power domain.
EMMC_PWR_EN 45 DO
eMMC power supply
enable control
NOTE

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