Automotive Module Series
AG525R-GL QuecOpen
Hardware Design
AG525R-GL_QuecOpen_Hardware_Design 65 / 104
1. When WLAN or BT function is used, the coexistence interface must be used simultaneously.
2. When BT function is enabled on the module, PCM_SYNC and PCM_CLK pins will only be used to
output signals.
3. It is recommended that the networks of PCIE_CLKREQ and PCIE_WAKE
are pulled up to VDD_EXT.
4. “*” means under development.
The following figure shows a reference design for WLAN and BT interfaces application.
BT_UART_RTS 61 DI BT UART request to send
1.8 V power domain.
Can be configured to
GPIOs.
BT_UART_CTS 62 DO BT UART clear to send
PCM_SYNC 265 IO PCM data frame sync
PCM_CLK 262 IO PCM data bit clock
PCM_IN 263 DI PCM data input
PCM_OUT 261 DO PCM data output
Others interfaces
WLAN_PWR_EN2 225 DO
WLAN power supply enable
control 2
1.8 V power domain.
WLAN_PWR_EN1 222 DO
WLAN power supply enable
control 1
WLAN_EN 228 DO WLAN enable
BT_EN 66 DO BT function enable
WLAN_SLP_CLK 231 DO WLAN sleep clock
VDD_WIFI_VM 276 PO Power supply for Wi-Fi Vnorm = 1.35 V
VDD_WIFI_VH 277 PO Power supply for Wi-FI Vnorm = 1.95 V
NOTES
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