Quectel RM500Q-GL

5G Module Series
RM500Q-GL Hardware Design
RM500Q-GL_Hardware_Design 55 / 85
The following figure shows a reference circuit for these four pins.
Host Module
CONFIG_0
CONFIG_1
CONFIG_2
CONFIG_3
GPIO
GPIO
GPIO
GPIO
21
69
75
1
VCC_IO_HOST
R1
10k
R2
10k
R3
10k
R4
10k
NM-0Ω
NM-0Ω
NM-0Ω
0Ω
NOTE: The voltage level of VCC_IO_HOST depends on the host side and could be 1.8 V or 3.3 V.
Figure 27: Recommended Circuit for Configuration Pins