Quectel RM520N-GL - Page 37

5G Module Series
RM520N-GL_Hardware_Design 36 / 84
Table 11: Definition of RESET# Pin
The module can be reset by pulling down the RESET# . An open collector/drain driver or a button can be
used to control RESET#.
Host Module
RESET#
BB
GPIO
67
Reset pulse
TRST#
R3
100k
R2
1k
Q1
NPN
VDD 1.8 V
1.5 μA
Figure 11: Reference Circuit of RESET# with NPN Driver Circuit
Module
RESET#
BB
67
TRST#
S1
TVS
33 pF
C1
NOTE: The capacitor C1 is recommended to be less than 47 pF.
VDD 1.8 V
1.5 μA
Figure 12: Reference Circuit of RESET# with a Button
Pin No.
Pin Name
I/O
Description
DC Characteristics
Comment
67
RESET#
DI, PU
Reset the module.
Active LOW
1.8 V
Internally pulled up to
1.8 V.