Renesas RL78 - Page 56

RL78/G11 UART Reception in STOP Mode Using Middle-speed On-chip Oscillator IAR
R01AN3634EJ0100 Rev.1.00 Page 56 of 85
Feb. 15, 2017
・Serial communication operation setting register 01 (SCR01)
Set UART0 channel 1 as follows:
・Operation mode: reception only
・Clock phase: type 1
・Data transmission order: LSB first
・Data length: 8-bit data
UART0 Channel 1 Serial Communication Operation Settings
Symbol: SCR01
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TXE
01
RXE
01
DAP
01
CKP
01
0 EOC
01
PTC
011
PTC
010
DIR
01
0 SLC
011
SLC
010
0 1 DLS
011
DLS
010
0 1 0 0 x 1 1 0 1 x 0 1 x x 1 1
Bit 15 - 14
TXE01 RXE01 Setting of operation mode of channel n
0 0 Disables communication
0 1 Reception only
1 0 Transmission only
1 1 Transmission/reception
Bit 13 - 12
DAP01 CKP01 Selection of data and clock phase in CSI mode
0 0 Type 1
0 1 Type 2
1 0 Type 3
1 1 Type 4
Bit 10
EOC01 Mask control of error interrupt signal (INTSREx (x = 0-3))
0 Disables generation of error interrupt INTSREx (INTSRx is generated)
1 Enables generation of error interrupt INTSREx (INTSRx is not generated if an error occurs).
Bit 9 - 8
PTC
011
PTC
010
Setting of parity bit setting in UART mode
Transmission Reception
0 0 Does not output the parity bit. Receives without parity
0 1 Outputs 0 parity No parity judgment
1 0 Outputs even parity. Judged as even parity.
1 1 Outputs odd parity. Judged as odd parity.