Sanyo PLV-WF10 - Page 63

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YUV to
RGB
YPbPr
to RGB
Video Port
Pixel
Processing
Graphics
Port Pixel
Processing
Processor
Memory
Interface
-- DRGBE
-- DRGBO
Video IN --
Graphics IN --
H/ V Sync IN --
FF-
Image
scalers
On-Screen
Display
color
Matrix
OSD Color
Lookup
Tables
Color
Space
Expander
Memory
Buffer
16-Bit
Microprocessor
Processor ROM/
RAM Interface
Sync
Decoder
and
Timer
Automatic
Image
Optimization
Clock
Generator
ROM/ RAM
Microprocessor Bus
Memory Out Bus
Memory In Bus
OSC
OSC
MCLK DCLK UCLK
CLK
PW365 Image Processor Block diagram
PW365-30U/ 20U/ 10U Image processor
Description;
* The PW365 Image Processor is a highly integrated “system-on-a-chip” that interfaces analog, digi-
tal, and video inputs in virtually any format to a digital projection system or multimedia display. The
PW365 is pin-compatible with the PW364.
* An embedded SDRAM frame buffer and memory controller perform frame rate conversion.
Computer image from VGA to UXGA at almost any refresh rate can be
resized to fit on a fixed-frequency target display device with any reso-
lution up to UXGA with full24-bit color.
Features;
* Second-generation Image Scaling
* Second-generation Automatic Image Optimization
* Color Space Converter for graphics inputs
* Video processing
* Picture-in-Picture
* Frame rate conversion
* Multi-region, non-linear scaling
FF-
352 pin PBGA Package