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Siemens SIMATIC ET 200SP - Assignment of the Feedback Interface

Siemens SIMATIC ET 200SP
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Using the module
5.1 Using the technology module
Counting, measurement and position detection
188 Function Manual, 12/2017, A5E32009889-AG
5.1.5.2
Assignment of the feedback interface
The user program receives current values and status information from the technology
module via the feedback interface.
Feedback interface per channel
The following table shows the assignment of the feedback interface:
Byte offset from
start address
Parameter
Meaning
0 … 3
COUNT_VALUE
DINT: Current counter value or position value
4 … 7
CAPTURED_VALUE
DINT: The last acquired Capture value
8 … 11
MEASURED_VALUE
REAL: Current measured value or DWORD: Full SSI frame
12 Bits 3 to 7: Reserve; set to 0
LD_ERROR
Bit 2: Error when loading via control interface
ENC_ERROR
Bit 1: Faulty encoder signal or SSI frame
POWER_ERROR Bit 0: S7-1500 module: Incorrect supply voltage L+ / ET 200SP module:
Supply voltage L+ too low
13
Bits 6 to 7: Reserve; set to 0
STS_SW_GATE
Bit 5: Software gate status (with incremental or pulse encoder)
STS_READY
Bit 4: Technology module started up and configured
LD_STS_SLOT_1
Bit 3: Load request for Slot 1 detected and executed (toggling)
LD_STS_SLOT_0
Bit 2: Load request for Slot 0 detected and executed (toggling)
RES_EVENT_ACK
Bit 1: Reset of event bits active
Bit 0: Reserve; set to 0
14
STS_DI2
Bit 7: TM Count: Status DI2 / TM PosInput, Compact CPU: Reserve; set to 0
STS_DI1
Bit 6: Status DI1
STS_DI0
Bit 5: Status DI0
STS_DQ1
Bit 4: Status DQ1
STS_DQ0
Bit 3: Status DQ0
STS_GATE
Bit 2: Internal gate status (with incremental or pulse encoder)
STS_CNT Bit 1: Count pulse or position value change detected within the last ca. 0.5 s
STS_DIR
Bit 0: Direction of last counter value or position value change
15 STS_M_INTERVAL Bit 7: Count pulse or position value change detected in previous measure-
ment interval
EVENT_CAP
Bit 6: Capture event occurred
EVENT_SYNC
Bit 5: Synchronization has occurred (with incremental or pulse encoder)
EVENT_CMP1
Bit 4: Comparison event for DQ1 has occurred
EVENT_CMP0
Bit 3: Comparison event for DQ0 has occurred
EVENT_OFLW
Bit 2: An overflow has occurred
EVENT_UFLW
Bit 1: An underflow has occurred
EVENT_ZERO
Bit 0: A zero pass has occurred

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