11.2 44-Pin QFN Si5340 Layout Recommendations
This section details the layout recommendations for the 44-pin Si5340 device using an example 6-layer PCB.
The following guidelines detail images of a six-layer board with the following stack:
• Layer 1: device layer, with low speed CMOS control/status signals, ground flooded
• Layer 2: crystal shield, output clocks, ground flooded
• Layer 3: ground plane
• Layer 4: power distribution, ground flooded
• Layer 5: input clocks, ground flooded
• Layer 6: low-speed CMOS control/status signals, ground flooded
This layout was designed to implement either a crystal or an external clock as the XAXB reference. The top layer is flooded with
ground. The clock output pins go to Layer 2 using vias to avoid crosstalk during transit. When the clock output signals are on Layer 2
there is a ground shield above, below and on all sides for protection. Output clocks should always be routed on an internal layer with
ground reference planes directly above and below. The plane that has the routing for the output clocks should have ground flooded
near the clock traces to further isolate the clocks from noise and other signals.
11.2.1 Si5340 Applications without a Crystal as the Reference Clock
If the application does not use a crystal, then the X1 and X2 pins should be left as “no connect” and should not be tied to ground. In
addition, there is no need for a crystal shield or the voids underneath the shield. If there is a differential external clock input on XAXB
there should be a termination circuit near the XA and XB pins. This termination circuit should be two 50 Ω resistors and one 0.1 μF cap
connected in the same manner as on the other clock inputs (IN0, IN1 and IN2). The clock input on XAXB must be ac-coupled. Care
should be taken to keep all clock inputs well isolated from each other as well as from any other dynamic signal.
Figure 11.9. Device Layer (Layer 1)
Note the vias to ground from the center ground pad. These are needed to create a low-impedance path to ground and a good thermal
path to ground. See 12.3 Grounding Vias for additional information on these vias.
Si5341, Si5340 Rev D Family Reference Manual • Crystal and Device Circuit Layout Recommendations
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
52 Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 26, 2021 52
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