Sony CDP-XA30ES - Page 25

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Pin No. Pin Name I/O Function
42 K3 I
Key input terminal (A/D input) EDIT/TIME FADE, REPEAT, FILE,
§ OPEN/CLOSE, (, P, p keys (S811 to S817) input
43 K4 I
Rotary encoder input terminal (A/D input) AMS ± key (RV801) input
44 K5 I
Rotary encoder input terminal (A/D input) AMS ≠ key (RV801) input
45 IN/OUT SW I Detection input from the loading in/out detect switch (S281, S282) (A/D input)
46 SCLK O Sense serial data reading clock signal output to the CXD2545Q (IC101)
47 PRGL O Serial data latch pulse signal output to the CXD8595Q (IC301)
48 CLK O Serial data transfer clock signal output to the CXD2545Q (IC101) and CXD8595Q (IC301)
49 SENSE I Internal status (SENSE) signal input from the CXD2545Q (IC101)
50 DATA O Serial data output to the CXD2545Q (IC101) and CXD8595Q (IC301)
51 SQCK O Sub-code Q data reading clock signal output to the CXD2545Q (IC101)
52 SUBQ I Sub-code Q data signal input from the CXD2545Q (IC101)
53 TEST O Output terminal for the test Not used (open)
54 SEL1 I Destination setting terminal (fixed at “L”)
55 SEL0 I Destination setting terminal (fixed at “L”)
56 RMIN I Remote control signal input from the remote control receiver (IC804)
57 TIMER I Timer control input terminal Not used (fixed at “H”)
58 TEST O Output terminal for the test Not used (open)
59 TEST O Output terminal for the test Not used (open)
60 SCOR I Sub-code sync (S0+S1) detection signal input from the CXD2545Q (IC101)
61 AMUTE O Muting control signal output to the analog mute driver and mute relay driver
62 LDON O Laser diode on/off selection signal output to the RF amplifier in optical pick-up
63 XLT O Serial data latch pulse signal output to the CXD2545Q (IC101)
64 LOAD OUT O Loading motor (M2) drive signal output to the NJM4558 (IC182) *1
65 LOAD IN O Loading motor (M2) drive signal output to the NJM4558 (IC182) *1
66 DOUT O Digital out on/off control signal output to the CXD2545Q (IC101) Not used (Open)
67 DMUTE O Muting control signal output to the CXD2545Q (IC101) and CXD8595Q (IC301)
68 D0 I/O
69 D1 I/O
70 D2 I/O
71 D3 I/O
72 VDD — Power supply terminal (+5V)
73 NC I Not used (fixed at “H”)
74 D4 I/O
75 D5 I/O
76 D6 I/O
77 D7 I/O
78 A0 O
79 A1 O Address signal output to the static RAM (IC352)
80 A2 O
Two-way data bus with the static RAM (IC352)
Two-way data bus with the static RAM (IC352)
*1 Loading motor (M2) control
LOAD OUT (pin ^¢)
“L” “H” “L” “H”
LOAD IN (pin ^∞)
“L” “L” “H” “H”
OFF OUT I N BRAKE
Operatio
n
Terminal