Sony HCD-GNX780 - Block Diagram - CDG Section

HCD-GNX780/GNX880
2727
HCD-GNX780/GNX880
7-1. BLOCK DIAGRAM – CDG SECTION –
A
MAIN
SECTION
(Page 29)
B
DISPLAY/POWER
SECTION
(Page 31)
OPTICAL PICK-UP
BLOCK
(KSM-215DCP/C2NP)
LD
DRIVER
Q10
CD DIGITAL
OUT
OPTICAL
CD MUTE
Q250,251
+3.3V
LD
GND
FOCUS
COIL
F+
F
T+
T
TRACKING
COIL
IC251
X171
16.9MHz
SL/SP MOTOR
DRIVER
12
6
11
13
14
VR
PD
15
16
17
18
4
26
23
2
20
MUTE
CH2OUT-F
CH1FIN
OUT
VREF
CH1RIN
CH2FIN
SFDR
OPIN+
CH2OUT-R
CH1OUT-R
CH1OUT-F
CH4OUT-R
CH4OUT-F
CH3OUT-F
CH3OUT-R
M
M
M101
(SPINDLE)
M102
(SLED)
S101
(LIMIT)
VCC
VC
A
B
C
D
E
F
DETECTOR
A
B
E
19
F
20
LD
36
PD
37
TFDR
11
FFDR
13
CH3FIN
9
OPTICAL
OUT
SSTP
7
MPD
6
95
XTACN
100
XRST
102
DATA
104
XLAT
105
CLOCK
86
AOUT2
81
AOUT1
71
DOUT
61
PCMD1
62
LRCKI
63
LRCK
65
PCMD
MP3
IC301
DECODER
SYSTEM
IC401 (1/5)
CONTROL
IC210
21
40
SDO0
11
LRCKIA
16
SFSY/LRCK1B
19
SDI0
14
77
XTAO
78
XTAI
55
VDD
VDD
VDDM
26
25
VC
27
C
28
D
29
107
SENS
XTCN
XRST
DATA
XLT
CLOCK
SENS
113
GFS
114
C2PO
TRDR
NC
NC
12
22
SRDR
CH3RIN
10
CH2RIN
FRDR
14
XRST
100
66
BCK
60
BCK1
BCKIA
15
SBSY/BCK1B
18
5
+3.3V
IC303
7
5 1
3
26
27
25
7
5
24
23
22
46
45
44
43
39
42
41
6
19
21
40
38
18
3
2
1
28
35
37
STANBY
36
PO11/BUCK/AD1
8
MIACK
7
MICK
6
MIDIO
4
MICS
5
MILP
2
RESET
41
SRMSTB
115
SCOR
SCOR
REG
CD MUTE DRIVE
Q540, 541
IC101
RF AMP, DSP, DAC
IC1002
DRAM
IC1001
VIDEO D/A
IC1003
+5V REG.
IC1006
VIDEO BUFFER
25,27,29,30
VA0-7
15-22
VD0-3
144
2623
RAS
CAS
A0-7
DQ1-4
X1002
14.31818MHz
60
XO1
59
XI1
X1001
17.734475MHz
58
XO2
57
XI2
+B SWITCH
Q1007,1008
NO402
CN402
IIC-CLK
IIC-DATA
IIC-CLK
IIC-DATA
3
4
CNVSS
J1001
TXD1
RTS1
ON BOARD
PROGRAM
CLK1
RXD1
CN VSS
RESET
RESET
VIDEO
OUT
VMUTE
133
WE
2822
CE
3
2
6
9
7
8
RAS
CAS
WE
CE
398
DATA
SBSO
5 110
SFSY
WFCK
299
CLCK
EXCK
6
MUTE
56
PDOWN
1,2,24,25
9-12,14-17
98
5
4
Q1004
SBSY
Q1005,1009
6
34
1
2
11 10
13
12
IC1005
Q1010
VCC
55
SENTSC
54
RESET
Q1002,1006
52
DEN
37
GDET
MUTE DATA
HALT_CLK
PAL/_NTSC
CDG-RST
EVER+3.3V
CDG-DET
CDG/-POWER
CDG/_BGC
CDG/-DET
44
VDOUT
Q1001
33 31 32 9
MUTE DATA
HALT_CLK
VMUTE
CDG-RST
CDG-DET
CDG-POWER
CNVSS
VMUTE
CDG RST
CDG DET
CD POWER
CNVSS
VMUTE
CDG-POWER
1
4
2
3
PWR
VIN
SAVE
6
VCC
VOUT
1
3
VIN
VOUT
: CD
: CDG
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
: VIDEO
R-CH
CD-L
MP3 STB
MP3 REQ
XTCN
MP3 REQ
MP3 STB
MP3 CLK
MP3 CLK
MP3 ACK
MP3 ACK
MP3 DATA OUT
MP3 DATA
MP3 LP
MP3 LP
MP3 CS
MP3 RST
MP3 CS
MP3 RST
MP3 DATA IN
SCOR
SENS
CD-CLK
XLAT
CD-DATA
XRST
XTCN
SCOR
SENS
CLOCK
XLT
DATA
XRST
CD MUTE
LMR
LMF
TM-R
TM-F
TBL_SENS
E-1
E-2
E-3
OPEN SW
12
RESET
30
IIC-DATA
29
IIC-CLK
IC701
TABLE LOADING
MOTOR DRIVER
4
2
9
7
RIN
FIN
OUT1
OUT2
IC712
TABLE MOTOR DRIVER
4
2
9
7
RIN
FIN
OUT1
OUT2
M751
(TABLE LOADING)
M741
(TABLE)
S751
(OPEN)
ROTARY
ENCODER
INVERTER
M
M
IC731
TBL ADDRESS
SENS
S711
E-3
E-2
E-1
M+9V
Q731