Sony HCD-SR1 - Page 100

22
HCD-SR1/SR2/SR3
IC608 AK4381VT-E2
PDN
CSN
CCLK
CDTI
MCLK
1
BICK
SDTI
LRCK
2
3
4
5
6
7
8
VSS
VDD
DZFR
DZFL
13
14
15
16
AOUTL–
AOUTL+
11
12
SCF
∆∑
MODULATOR
8x
INTERPOLATOR
AOUTR–
AOUTR+
9
10
SCF
∆∑
MODULATOR
8x
INTERPOLATOR
AUDIO
DATA
INTERFACE
CLOCK
DIVIDER
DE–EMPHASIS
CONTROL
µP
INTERFACE
IC609 PCM1802DBR
SINGLE-END/
DIFFERENTIAL
CONVERTER
5TH ORDER
DELTA-SIGMA
MODULATOR
VINL
1
SINGLE-END/
DIFFERENTIAL
CONVERTER
VINR
2
VREF1
3
VREF2
4
5TH ORDER
DELTA-SIGMA
MODULATOR
REFERENCE
x16 1/64
(x1/128)
DECIMATION
FILTER
WITH
DC CUT
FILTER
SERIAL
INTERFACE
&
MODE/FORMAT
CONTROL
MODE1
20
MODE0
19
FMT1
18
FMT0
17
DOUT
12
BCK
11
OSR
16
SCKI
15
VDD
14
DGND
13
CLOCK & TIMING CONTROL
PDWN
7
BYPAS
8
VCC
5
AGND
6
FSYNC
9
LRCK
10
POWER
SUPPLY
IC612 CXD9742Q
VDDL
VSS
37
DSBCK 38
24
DSIFL
POCSW
39
22
POFLR23
DSIFR
POSLR
40
21
DSICT
PLRCK
41
20
DSISW
PBCK
42
19
DSISL
VDDH
43
18
DSISR
MCKOUT
44
17
DIRDSCK
VSS
45
16
SYNC
FMTPCM
46
15
INIT
DIRPCK
47
14
VSS
VDDL
48
13
VDDL
EXIFLR
1
35
VSS
36
SEL1FS
EXICSW
2
34
SEL4FS
EXISLR
3
33
SELEXT
EXILRCK
4
32
DSGAIN
EXIBCK
5
31
XMTPCM
VDDH
6
30
VDDH
EXIMCK
7
29
TEST1
VSS
8
28
TEST2
MCK
9
27
TEST3
TOUT2
10
26
TOUT1
VDDL
11
VSS
12
25
FIR FILTER
&
DOWN
SAMPLING
UNIT
CLOCK
GENERATOR
&
TIMING
CONTROL
ROM
24 bit
720 word
INT/EXT
DATA
SELECT
INT/EXT
CLOCK
SELECT
PCM
MUTE
TEST
CONTROL
PCM
I/F
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
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