3.6.24 Ethernet (ETH): media access control (MAC) with DMA controller
Table 95. ETH_SM_0
SM CODE ETH_SM_0
Description Periodical read-back of Ethernet configuration registers
Ownership End user
Detailed implementation
This method must be applied to Ethernet configuration registers (including those relate to unused
module features). Detailed information on the implementation of this method can be found in
Section 3.6.5
Error reporting Refer to NVIC_SM_0
Fault detection time Refer to NVIC_SM_0
Addressed fault model Refer to NVIC_SM_0
Dependency on MCU configuration Refer to NVIC_SM_0
Initialization Refer to NVIC_SM_0
Periodicity Refer to NVIC_SM_0
Test for the diagnostic Refer to NVIC_SM_0
Multiple faults protection Refer to NVIC_SM_0
Recommendations and known limitations Refer to NVIC_SM_0
Table 96. ETH_SM_1
SM CODE ETH_SM_1
Description Protocol error signals including hardware CRC
Ownership ST
Detailed implementation
Ethernet communication module embeds protocol error checks (like overrun, underrun, timeout,
packet composition violation etc.) and CRC-packet checks as well, conceived to detect network-
related abnormal conditions. These mechanisms are able anyway to detect a percentage of
hardware random failures affecting the module itself.
Error reporting Error flag raise and optional Interrupt Event generation
Fault detection time Depends on peripheral configuration (e.g. baud rate), refer to functional documentation
Addressed fault model Permanent and transient
Dependency on MCU configuration None
Initialization Depends on implementation
Periodicity Continuous
Test for the diagnostic N/A
Multiple faults protection ETH_SM_2 information redundancy techniques on messages, including end-to-end safing
Recommendations and known limitations -
Table 97. ETH_SM_2
SM CODE ETH_SM_2
Description Information redundancy techniques on messages, including End to End safing
Ownership End user
UM1845
Description of hardware and software diagnostics
UM1845 - Rev 4
page 65/108
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