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Supermicro SuperServer 2029TP-HC0R - Chipset Configuration; North Bridge

Supermicro SuperServer 2029TP-HC0R
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SuperServer 2029TP-HTR/HC1R/HC0R User's Manual
78
Enhanced Halt State (C1E)

CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
CPU T State Control
Software Controlled T-States
If this feature is set to Enable, CPU throttling settings will be supported by the software of
the system. The options are Disable and Enable.
Chipset Conguration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.
North Bridge

UPI (Ultra Path Interconnect) Conguration

Number of CPU
Number of IIO
Current UPI Link Speed
Current UPI Link Frequency
UPI Global MMIO Low Base/Limit
UPI Global MMIO High Base/Limit

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