This Register is used to enable alternate
functionalities for each I/O pin. When set to zero
the corresponding I/O pin is a standard I/O pin,
when set to 1 any other setting for this I/O are
overwritten by the peripheral functionality.
representing the I/O pins
xxxxxxxx
<PC7…PC0><PB7…PB0><PA7…PA0>
Operations
R/W LOCAL
R/W REMOTE
Becomes effective
After Reset
Notes
PA7 indicates that the UART has data to send.
PB0 is used internally on the ETRX357-LRS and
ETRX357HR-LRS and is not available to the
user.
Storage
Non-Volatile
Parameters
XXXXXXXX
Where XXXXXXXX represents a 32-bit
hexadecimal number.
bits 31-24 reserved
bit 23 Set: PC7 indicates status of DMODE.
Set High = Active, set low =
Inactive. PC7 needs to be defined
as output in S16 and can be
overridden using S18
bit 22: Set: Enable nTX_Active (reserved on
-ERS Variants)
bit 21 Set: Enable TX_Active (reserved on –
LRS and –ERS Variants)
bit 20 reserved (PC4)
bit 19 reserved (PC3)
bit 18 reserved (PC2)
bit 17 Set: Enable ADC3 (PC1)
bit 16 reserved (PC0)
bit 15 Set: Enable ADC2, can be used as
PWM out when enabled in S11
(PB7)
bit 14 Set: Enable ADC1 (PB6)
bit 13 Set: Enable ADC0, not available on –
ERS variants (PB5)
bit 12 Set: reserved, RTS when enabled in
S12 (PB4)
bit 11 Set: reserved, CTS when enabled in
S12 (PB3)
bit 10 Set: Enable RXD input (PB2)
bit 9 Set: Enable TXD output (PB1)
bit 8 Set: Enable 1.2V Vref Output during
ADC conversions (PB0), reserved
on -LRS and -ERS variants
bit 7 Set: UART TX_ACTIVE (PA7)
bit 6 reserved (PA6)
bit 5 reserved (PA5)
bit 4 reserved (PA4)
bit 3 reserved (PA3)
bit 2 reserved (PA2)
bit 1 reserved (PA1)
bit 0 reserved (PA0)
Factory Default
00000600
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