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Texas Instruments TPS65982 User Manual

Texas Instruments TPS65982
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5 A
NMOS
HV Gate Control and Sense
SENSEP
SENSEN
HV_GATE1
HV_GATE2
VBUS
PP_EXT
Figure 9-21. External HV Switch as a Sink without RSENSE
9.3.3.14 External Current Sense
The current through the external NFETs to VBUS is sensed through the RSENSE resistor and is available to be
read digitally through the ADC. When acting as a source, the readout from the ADC will only accurately reflect
the current through the external NFETs when the connection of SENSEP and SENSEN adheres to Figure 9-11.
When acting as a sink, the readout from the ADC will only accurately reflect the current through the external
NFETs when the connection of SENSEP and SENSEN adheres to Figure 9-20.
9.3.3.15 External Current Limit
The current through the external NFETs to VBUS is current limited when acting as a source or a sink. The
current is sensed across the external RSENSE resistance. The current limit is set by a combination of the
RSENSE magnitude and configuration settings for the voltage across the resistance. When the voltage across
the RSENSE resistance exceeds the automatically set voltage limit, the current-limit circuit is activated.
9.3.3.16 Soft Start
When configured as a sink, the SS pin provides a soft start function for each of the high-voltage power path
supplies (P_HV and external PP_EXT path) up to 5.5 V. The SS circuitry is shared for each path and only one
path will turn on as a sink at a time. The soft start is enabled by application code or via the host processor.
The SS pin is initially discharged through a resistance RSS_DIS. When the switch is turned on, a current ISS is
sourced from the pin to a capacitance CSS. This current into the capacitance generates a slow ramping voltage.
This voltage is sensed and the power path FETs turn on and the voltage follows this ramp. When the voltage
reaches the threshold VTHSS, the power path FET will be near being fully turned on, the output voltage will be
fully charged. At time TSSDONE, a signal to the digital core indicates that the soft start function has completed.
The ramp rate of the supply is given by Equation 4:
ISS
Ramp Rate 9
CSS
= ´
(4)
The maximum ramp voltage for the supply is approximately 16.2 V. For any input voltage higher than this, the
ramp will stop at 16.2 V until the firmware disables the soft start. At this point, the voltage will step to the input
voltage at a ramp rate defined by approximately 7 μA into the gate capacitance of the switch. The TSSDONE
time is independent of the actual final ramp voltage.
9.3.3.17 BUSPOWERZ
At power-up, when VIN_3V3 is not present and a dead-battery condition is supported as described in Dead-
Battery or No-Battery Support, the TPS65982 will appear as a USB Type-C sink (device) causing a connected
USB Type-C source (host) to provide 5 V on VBUS. The TPS65982 will power itself from the 5-V VBUS rail (see
Power Management) and execute boot code (see Boot Code). The boot code will observe the BUSPOWERZ
voltage, which will fall into one of three voltage ranges: VBPZ_DIS, VBPZ_HV, and VBPZ_EXT (defined in
TPS65982
SLVSD02E – MARCH 2015 – REVISED AUGUST 2021
www.ti.com
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Product Folder Links: TPS65982

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Texas Instruments TPS65982 Specifications

General IconGeneral
BrandTexas Instruments
ModelTPS65982
CategoryMotherboard
LanguageEnglish

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