Toshiba PA912 - Page 72

Chapter 3 Setting
6F8C1259
60
・
・・
・ Global error bit
offset b7 b6 b5 b4 B3 b2 b1 b0
16 NDT ACL
Figure 3-37 Global error bit
Table 3-6 Global error bit
Name Description
NDT 1: Halted slave exists
0: In normal operation
ACL 1: Automatic clear mode is enabled
0: Automatic clear mode is not enabled
・
・・
・ Master status
offset b15 b14 b13 b12 b11 b10 b9 b8
16 Master status
Figure 3-38 Master status
Table 3-7 Master status
Value Name Description
00h OFFLINE Offline status
40h STOP Master-slave data transmission halted
80h CLEAR Slave input information can be read out; output is cleared or
retained.
C0h OPERATE Cyclically inputting/outputting data
・
・・
・ Remote address with error occurrence
offset b7 b6 b5 b4 B3 b2 b1 b0
17 Remote address with error occurrence
Figure 3-39 Remote address with error occurrence
Table 3-8 Remote address with error occurrence
Value Description
00h No error in master module
FFh Error in master module