VIPA System 300V - Page 93

Manual VIPA System 300V Chapter 6 Deployment CPU 31x with TCP/IP
HB130E - CPU - Rev. 11/50 6-3
Ethernet supports the principle of random bus accesses: every station on
the network accesses the bus independently as and when required. These
accesses are coordinated by a CSMA/CD (Carrier Sense Multiple
Access/Collision Detection) scheme: every station "listens" on the bus
cable and receives communication messages that are addressed to it.
Stations only initiate a transmission when the line is unoccupied. In the
event that to participants should start transmitting simultaneously, they will
detect this and stop transmitting, to restart after a random delay time has
expired.
The internal CP of the CPU 31xNET is directly connected to the CPU 31x
by means of a Dual-Port-RAM. The Dual-Port-RAM is divided into 4 equal
segments called page frames.
These 4 page frames are available at the CPU as Standard-CP-Interface.
Data is exchanged by means of standard handler blocks (SEND and
RECEIVE).
The communication under TCP/IP is controlled by means of connections.
These are defined by means of the VIPA configuration tool WinNCS and
transferred into the CPU via the Twisted-Pair connector.
For details on the configuration, please refer to the WinNCS manual
(HB91)
CPCPU
Verbindungen
parametriert
mit WinNCS
Ethernet
Daten
HTBs
Anwender-
programm
(SEND, RECEIVE)
Frames
VIPA Rack-135U
CP 143 H1 / TCP/IP
System 200V
CPU 21x NET
Frames
Frames
CPU 31x NET
CPCPU
Connections
configured
with WinNCS
Ethernet
additional interfaces
Daten
HTBs
Application
program
(SEND, RECEIVE)
Frames
4port Switch
Frames
VIPA Rack-135U
CP 143 H1 / TCP/IP
System 200V
CPU 21x NET
Frames
Frames
Access Control
Communication