Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 126
UG917 (v1.4) September 25, 2015
Appendix D: Master Constraints File Listing
set_property PACKAGE_PIN K8 [get_ports "FMC_HPC_LA10_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA10_N"]
set_property PACKAGE_PIN L8 [get_ports "FMC_HPC_LA10_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA10_P"]
set_property PACKAGE_PIN J11 [get_ports "FMC_HPC_LA11_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA11_N"]
set_property PACKAGE_PIN K11 [get_ports "FMC_HPC_LA11_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA11_P"]
set_property PACKAGE_PIN D10 [get_ports "FMC_HPC_LA12_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA12_N"]
set_property PACKAGE_PIN E10 [get_ports "FMC_HPC_LA12_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA12_P"]
set_property PACKAGE_PIN C9 [get_ports "FMC_HPC_LA13_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA13_N"]
set_property PACKAGE_PIN D9 [get_ports "FMC_HPC_LA13_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA13_P"]
set_property PACKAGE_PIN A10 [get_ports "FMC_HPC_LA14_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA14_N"]
set_property PACKAGE_PIN B10 [get_ports "FMC_HPC_LA14_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA14_P"]
set_property PACKAGE_PIN C8 [get_ports "FMC_HPC_LA15_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA15_N"]
set_property PACKAGE_PIN D8 [get_ports "FMC_HPC_LA15_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA15_P"]
set_property PACKAGE_PIN A9 [get_ports "FMC_HPC_LA16_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA16_N"]
set_property PACKAGE_PIN B9 [get_ports "FMC_HPC_LA16_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA16_P"]
set_property PACKAGE_PIN C24 [get_ports "FMC_HPC_LA17_CC_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA17_CC_N"]
set_property PACKAGE_PIN D24 [get_ports "FMC_HPC_LA17_CC_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA17_CC_P"]
set_property PACKAGE_PIN E23 [get_ports "FMC_HPC_LA18_CC_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA18_CC_N"]
set_property PACKAGE_PIN E22 [get_ports "FMC_HPC_LA18_CC_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA18_CC_P"]
set_property PACKAGE_PIN C22 [get_ports "FMC_HPC_LA19_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA19_N"]
set_property PACKAGE_PIN C21 [get_ports "FMC_HPC_LA19_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA19_P"]
set_property PACKAGE_PIN A24 [get_ports "FMC_HPC_LA20_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA20_N"]
set_property PACKAGE_PIN B24 [get_ports "FMC_HPC_LA20_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA20_P"]
set_property PACKAGE_PIN F24 [get_ports "FMC_HPC_LA21_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA21_N"]
set_property PACKAGE_PIN F23 [get_ports "FMC_HPC_LA21_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA21_P"]
set_property PACKAGE_PIN F25 [get_ports "FMC_HPC_LA22_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA22_N"]
set_property PACKAGE_PIN G24 [get_ports "FMC_HPC_LA22_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA22_P"]
set_property PACKAGE_PIN F22 [get_ports "FMC_HPC_LA23_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA23_N"]
set_property PACKAGE_PIN G22 [get_ports "FMC_HPC_LA23_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA23_P"]
set_property PACKAGE_PIN E21 [get_ports "FMC_HPC_LA24_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA24_N"]
set_property PACKAGE_PIN E20 [get_ports "FMC_HPC_LA24_P"]
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English