Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 127
UG917 (v1.4) September 25, 2015
Appendix D: Master Constraints File Listing
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA24_P"]
set_property PACKAGE_PIN D21 [get_ports "FMC_HPC_LA25_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA25_N"]
set_property PACKAGE_PIN D20 [get_ports "FMC_HPC_LA25_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA25_P"]
set_property PACKAGE_PIN F20 [get_ports "FMC_HPC_LA26_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA26_N"]
set_property PACKAGE_PIN G20 [get_ports "FMC_HPC_LA26_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA26_P"]
set_property PACKAGE_PIN G21 [get_ports "FMC_HPC_LA27_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA27_N"]
set_property PACKAGE_PIN H21 [get_ports "FMC_HPC_LA27_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA27_P"]
set_property PACKAGE_PIN B22 [get_ports "FMC_HPC_LA28_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA28_N"]
set_property PACKAGE_PIN B21 [get_ports "FMC_HPC_LA28_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA28_P"]
set_property PACKAGE_PIN A20 [get_ports "FMC_HPC_LA29_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA29_N"]
set_property PACKAGE_PIN B20 [get_ports "FMC_HPC_LA29_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA29_P"]
set_property PACKAGE_PIN B26 [get_ports "FMC_HPC_LA30_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA30_N"]
set_property PACKAGE_PIN C26 [get_ports "FMC_HPC_LA30_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA30_P"]
set_property PACKAGE_PIN A25 [get_ports "FMC_HPC_LA31_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA31_N"]
set_property PACKAGE_PIN B25 [get_ports "FMC_HPC_LA31_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA31_P"]
set_property PACKAGE_PIN D26 [get_ports "FMC_HPC_LA32_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA32_N"]
set_property PACKAGE_PIN E26 [get_ports "FMC_HPC_LA32_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA32_P"]
set_property PACKAGE_PIN A28 [get_ports "FMC_HPC_LA33_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA33_N"]
set_property PACKAGE_PIN A27 [get_ports "FMC_HPC_LA33_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_HPC_LA33_P"]
#FMC LPC
set_property PACKAGE_PIN AA25 [get_ports "FMC_LPC_CLK0_M2C_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_CLK0_M2C_N"]
set_property DIFF_TERM TRUE [get_ports "FMC_LPC_CLK0_M2C_N"]
set_property PACKAGE_PIN AA24 [get_ports "FMC_LPC_CLK0_M2C_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_CLK0_M2C_P"]
set_property DIFF_TERM TRUE [get_ports "FMC_LPC_CLK0_M2C_P"]
set_property PACKAGE_PIN AC32 [get_ports "FMC_LPC_CLK1_M2C_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_CLK1_M2C_N"]
set_property DIFF_TERM TRUE [get_ports "FMC_LPC_CLK1_M2C_N"]
set_property PACKAGE_PIN AC31 [get_ports "FMC_LPC_CLK1_M2C_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_CLK1_M2C_P"]
set_property DIFF_TERM TRUE [get_ports "FMC_LPC_CLK1_M2C_P"]
set_property PACKAGE_PIN J26 [get_ports "FMC_LPC_PRSNT_M2C_B_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_LPC_PRSNT_M2C_B_LS"]
set_property PACKAGE_PIN L24 [get_ports "FMC_VADJ_ON_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "FMC_VADJ_ON_LS"]
#FMC LPC LA
set_property PACKAGE_PIN W24 [get_ports "FMC_LPC_LA00_CC_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA00_CC_N"]
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English