Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 130
UG917 (v1.4) September 25, 2015
Appendix D: Master Constraints File Listing
set_property PACKAGE_PIN Y32 [get_ports "FMC_LPC_LA30_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA30_N"]
set_property PACKAGE_PIN Y31 [get_ports "FMC_LPC_LA30_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA30_P"]
set_property PACKAGE_PIN W34 [get_ports "FMC_LPC_LA31_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA31_N"]
set_property PACKAGE_PIN V33 [get_ports "FMC_LPC_LA31_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA31_P"]
set_property PACKAGE_PIN Y30 [get_ports "FMC_LPC_LA32_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA32_N"]
set_property PACKAGE_PIN W30 [get_ports "FMC_LPC_LA32_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA32_P"]
set_property PACKAGE_PIN Y33 [get_ports "FMC_LPC_LA33_N"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA33_N"]
set_property PACKAGE_PIN W33 [get_ports "FMC_LPC_LA33_P"]
set_property IOSTANDARD LVDS [get_ports "FMC_LPC_LA33_P"]
#GPIO DIP SW
set_property PACKAGE_PIN AN16 [get_ports "GPIO_DIP_SW0"]
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW0"]
set_property PACKAGE_PIN AN19 [get_ports "GPIO_DIP_SW1"]
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW1"]
set_property PACKAGE_PIN AP18 [get_ports "GPIO_DIP_SW2"]
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW2"]
set_property PACKAGE_PIN AN14 [get_ports "GPIO_DIP_SW3"]
set_property IOSTANDARD LVCMOS12 [get_ports "GPIO_DIP_SW3"]
#GPIO LEDs
set_property PACKAGE_PIN AP8 [get_ports "GPIO_LED_0_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_0_LS"]
set_property PACKAGE_PIN H23 [get_ports "GPIO_LED_1_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_1_LS"]
set_property PACKAGE_PIN P20 [get_ports "GPIO_LED_2_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_2_LS"]
set_property PACKAGE_PIN P21 [get_ports "GPIO_LED_3_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_3_LS"]
set_property PACKAGE_PIN N22 [get_ports "GPIO_LED_4_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_4_LS"]
set_property PACKAGE_PIN M22 [get_ports "GPIO_LED_5_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_5_LS"]
set_property PACKAGE_PIN R23 [get_ports "GPIO_LED_6_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_6_LS"]
set_property PACKAGE_PIN P23 [get_ports "GPIO_LED_7_LS"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_LED_7_LS"]
#GPIO P.B. SW
set_property PACKAGE_PIN AE10 [get_ports "GPIO_SW_C"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_SW_C"]
set_property PACKAGE_PIN AE8 [get_ports "GPIO_SW_E"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_SW_E"]
set_property PACKAGE_PIN AD10 [get_ports "GPIO_SW_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_SW_N"]
set_property PACKAGE_PIN AF8 [get_ports "GPIO_SW_S"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_SW_S"]
set_property PACKAGE_PIN AF9 [get_ports "GPIO_SW_W"]
set_property IOSTANDARD LVCMOS18 [get_ports "GPIO_SW_W"]
set_property PACKAGE_PIN AN8 [get_ports "CPU_RESET"]
set_property IOSTANDARD LVCMOS18 [get_ports "CPU_RESET"]
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English