Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 131
UG917 (v1.4) September 25, 2015
Appendix D: Master Constraints File Listing
#GPIO PMOD0
set_property PACKAGE_PIN AK25 [get_ports "PMOD0_0_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_0_LS"]
set_property PACKAGE_PIN AN21 [get_ports "PMOD0_1_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_1_LS"]
set_property PACKAGE_PIN AH18 [get_ports "PMOD0_2_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_2_LS"]
set_property PACKAGE_PIN AM19 [get_ports "PMOD0_3_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_3_LS"]
set_property PACKAGE_PIN AE26 [get_ports "PMOD0_4_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_4_LS"]
set_property PACKAGE_PIN AF25 [get_ports "PMOD0_5_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_5_LS"]
set_property PACKAGE_PIN AE21 [get_ports "PMOD0_6_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_6_LS"]
set_property PACKAGE_PIN AM17 [get_ports "PMOD0_7_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD0_7_LS"]
#GPIO PMOD1
set_property PACKAGE_PIN AL14 [get_ports "PMOD1_0_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_0_LS"]
set_property PACKAGE_PIN AM14 [get_ports "PMOD1_1_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_1_LS"]
set_property PACKAGE_PIN AP16 [get_ports "PMOD1_2_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_2_LS"]
set_property PACKAGE_PIN AP15 [get_ports "PMOD1_3_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_3_LS"]
set_property PACKAGE_PIN AM16 [get_ports "PMOD1_4_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_4_LS"]
set_property PACKAGE_PIN AM15 [get_ports "PMOD1_5_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_5_LS"]
set_property PACKAGE_PIN AN18 [get_ports "PMOD1_6_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_6_LS"]
set_property PACKAGE_PIN AN17 [get_ports "PMOD1_7_LS"]
set_property IOSTANDARD LVCMOS12 [get_ports "PMOD1_7_LS"]
#GPIO ROTARY SW
set_property PACKAGE_PIN Y21 [get_ports "ROTARY_INCA"]
set_property IOSTANDARD LVCMOS18 [get_ports "ROTARY_INCA"]
set_property PACKAGE_PIN AD26 [get_ports "ROTARY_INCB"]
set_property IOSTANDARD LVCMOS18 [get_ports "ROTARY_INCB"]
set_property PACKAGE_PIN AF28 [get_ports "ROTARY_PUSH"]
set_property IOSTANDARD LVCMOS18 [get_ports "ROTARY_PUSH"]
#GPIO SMA
set_property PACKAGE_PIN G27 [get_ports "USER_SMA_GPIO_N"]
set_property IOSTANDARD LVCMOS18 [get_ports "USER_SMA_GPIO_N"]
set_property PACKAGE_PIN H27 [get_ports "USER_SMA_GPIO_P"]
set_property IOSTANDARD LVCMOS18 [get_ports "USER_SMA_GPIO_P"]
#HDMI
set_property PACKAGE_PIN AJ13 [get_ports "HDMI_INT"]
set_property IOSTANDARD LVCMOS18 [get_ports "HDMI_INT"]
set_property PACKAGE_PIN AF13 [get_ports "HDMI_R_CLK"]
set_property IOSTANDARD LVCMOS18 [get_ports "HDMI_R_CLK"]
set_property PACKAGE_PIN AK11 [get_ports "HDMI_R_D0"]
set_property IOSTANDARD LVCMOS18 [get_ports "HDMI_R_D0"]
set_property PACKAGE_PIN AP11 [get_ports "HDMI_R_D1"]
set_property IOSTANDARD LVCMOS18 [get_ports "HDMI_R_D1"]
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English