20 www.xilinx.com VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
Chapter 1: VC707 Evaluation Board Features
Additional FPGA bitstreams can be stored and used for configuration by setting the Warm
Boot Start Address (WBSTAR) register contained in 7 series FPGAs. More information is
available in the reconfiguration and multiboot section in 7 Series FPGAs Configuration
User Guide (UG470) [Ref 2].
The configuration section of 7 Series FPGAs Configuration User Guide (UG470) [Ref 2]
provides details on the Master BPI configuration mode.
Figure 1-4 shows the connections of the linear BPI Flash memory on the VC707 board. For
more details, see the Micron PC28F00AG18FE data sheet [Ref 16].
AM37 FLASH_D8 E1 DQ8
AG33 FLASH_D9 E3 DQ9
AH33 FLASH_D10 F3 DQ10
AK35 FLASH_D11 F4 DQ11
AL35 FLASH_D12 F5 DQ12
AJ31 FLASH_D13 H5 DQ13
AH34 FLASH_D14 G7 DQ14
AJ35 FLASH_D15 E7 DQ15
AM34 FLASH_WAIT F7 WAIT
BB41 FPGA_FWE_B G8 WE_B
BA41 FLASH_OE_B F8 OE_B
N10 FPGA_CCLK E6 CLK
AL36 FLASH_CE_B B4 CE_B
AY37 FLASH_ADV_B F6 ADV_B
AG11 FPGA_INIT_B D4 RST_B
Table 1-5: BPI Flash Memory Connections to the FPGA (Cont’d)
FPGA (U1) Pin Net Name
BPI Flash Memory (U3)
Pin Number Pin Name
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