Xilinx VC707 User Manual

UG885 (v1.4) May 12, 2014 www.xilinx.com VC707 Evaluation Board
02/01/13 1.2 Updated VC707 Board Features, Table 1-1, Virtex-7 XC7VX485T-2FFG1761C FPGA,
FPGA Configuration, USB JTAG, System Clock (SYSCLK_P and SYSCLK_N), HDMI
Video Output, I
2
C Bus, Table 1-15, User I/O, Table 1-26, Power Management, and VITA
57.1 FMC2 HPC Connector (Partially Populated). Updated Figure 1-5, Figure 1-16, and
Figure 1-25. Updated paragraph following Table 1-4, Figure 1-7, Figure 1-19, Figure 1-20,
and Table 1-24. Added CPU Reset Pushbutton, User Rotary Switch, User SMA, and PCIe
Form Factor Board TI Power System Cooling. Added Table 1-27 and Table 1-28.
Replaced PTD08D021W with PTD08D210W in Table 1-29. Added third paragraph to the
introduction in Appendix C, Master Constraints File Listing. Added UG483 and
removed NXP Semiconductors in Appendix F, Additional Resources. Added second
paragraph to the introduction in Appendix G, Regulatory and Compliance Information.
08/22/13 1.3 Updated Figure 1-2, Table 1-1, Table 1-12, Table 1-13, and Table 1-14. Updated Linear BPI
Flash Memory. Replaced Master UCF Listing with Appendix C, Master Constraints File
Listing.
05/12/14 1.4 Updated disclaimer and copyright. In Table 1-27, changed U1 FPGA pin N39 to M39, B36
to A35, and B37 to A36.
Date Version Revision

Xilinx VC707 Specifications

General

Brand	Xilinx
Model	VC707
Category	Motherboard
Language	English