Xilinx VCU128 User Manual

Block Diagram
A block diagram of the VCU128 evaluaon board is shown in the following gure.
Figure 1: Evaluation Board Block Diagram
233
not used
232
not used
231
not used
230
not used
229
not used
228
not used
227
226
225
224
235
not used
234
not used
70 71 72 75 74 73 135
133
not used
134
132
131
129
130
not used
128
127
126
125
124
NC
0
HBM_43_PWR HBM_43_PWR
69
0
XCVU37P-FSVH2892
68
HBM_83
Not
used
67 64
HBM_43
Not
used
65 66
36-bit QDR-IV SDRAM
(shown at banks 68, 69)
36-bit DQB-port
FMCP HSPC
LA[00:33]
72-bit RLD-3 (2x32Mx36)
MT44K32M36RB-107E
Not used
Not used
QSFP1 TX/RX[1:4]
QSFP1_SI570_CLOCK
QSFP2 TX/RX[1:4]
QSFP2_SI570_CLOCK
SI5328_CLOCK1
QSFP3 TX/RX[1:4]
QSFP3_SI570_CLOCK
SI5328_CLOCK2
QSFP4 TX/RX[1:4]
QSFP4_SI570_CLOCK
SMA_REFCLK_INPUT
FMCP_HSPC_DP[20:23]
FMCP_HSPC_GBTCLK5
FMCP_HSPC_DP[16:19]
FMCP_HSPC_GBTCLK4
FMCP_HSPC_DP[12:15]
FMCP_HSPC_GBTCLK3
FMCP_HSPC_DP[8:11]
FMCP_HSPC_GBTCLK2
FMCP_HSPC_DP[4:7]
FMCP_HSPC_GBTCLK1
FMCP_HSPC_DP[0:3]
FMCP_HSPC_GBTCLK0
72-bit DDR4 Comp. Memory
(4.5X512MX16)
MT40A512M16LY-075E
GPIO 1.8V
ENET
LED[0:7]
PL_I2C0 BUS
UART0, UART1
QSFP1, QSFP4 CTRL
SMA_CLK OUT(P/N)
SYSCTLR_UCA1 (TX/RX)
36-bit DQA-port + common
36-bit QDR-IV SDRAM 4Mx36 Dual-Port
CY7C4142KV13_106FCXC
36-bit DQB-port
Bank 70
PCIE_EP_TX/RX[4:7]
PCIE_EP_TX/RX[0:3]
PCIE_CLK2
PCIE_EP_TX/RX[8:11]
PCIE_CLK1
PCIE_EP_TX/RX[12:15]
INIT LED
DONE LED
PROG_B PB
1.5V BATT.
QSPI 2Gb
System Controller
XC7Z010CLG225
GPIO
X21647-112818
Board Features
The VCU128 evaluaon board features are listed here. Detailed informaon for each feature is
provided in Chapter 3: Board Component Descripons.
• Virtex
®
UltraScale+™ XCVU37P-2FSVH2892E device
• Zynq
®
-7000 SoC XC7Z010 based system controller
• 4.5 GB DDR4 72-bit component memory interface (4.5 x [512 Mb x 16])
Chapter 1: Introduction
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 6
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Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English