Xilinx VCU128 User Manual

Default Switch and Jumper Settings
Switches
Default switch sengs are listed in the following table. The switch locaons are shown in Figure
2. The following table also references the respecve schemac page numbers.
Table 2: Default Switch Settings
Switch Function Default Comments
Figure 2
Callout
Schematic
Page
SW5 On/Off SPST slide switch OFF Board shipped with power switch off 33 52
SW1 4-pole configuration
1
Default = SPI
SW1[1:4] =
0001
Position 1 = System Controller Enable
SW1[2:4] = FPGA U1 mode M[2:0] = 001
36 3
SW2 FPGA_PROG_B P.B. NA U1 XCVU37P PROG_B (active low) 30 3
SW3 SYSCTLR_POR_B P.B. NA U42 XC7Z010 POR_B (active low) Near
29
50
SW4 CPU_RESET P.B. NA U1 XCVU37P USER P.B. (active high) 29 47
Notes:
1. DIP switch sections are active-High (connected net is pulled High when DIP switch is closed = 1).
Jumpers
Default jumper sengs are listed in the following table. Jumper header locaons are shown in
Figure 2. The following table also references the respecve schemac page numbers.
Table 3: Default Jumper Settings
Jumper Function Default Comments
Figure 2
Callout
Schematic
Page
J14 Power on reset (POR)
override
2-3 U1 POR_OVERRIDE pin
BG15 to GND
38 3
J25 VCCINT select 1-2 1-2: 0.85V; 2-3: 0.72V
1
39 54
J46 PCIe lane size select 7-8 16-lane configuration 37 41
J43 SYSCTLR RE-PROG Off U42 XCZU7010 MIO5 pin
A9
40 50
Notes:
1. VCCINT select header J25 should always have a jumper block installed.
Chapter 2: Board Setup and Configuration
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 13
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Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English