Xilinx Virtex-6 FPGA Getting Started Guide

Virtex-6 FPGA Connectivity Kit Getting Started www.xilinx.com 71
UG664 (v1.4) July 6, 2011
Getting Started with the Virtex-6 FPGA IBERT Reference Design
9. Open the ChipScope Pro Analyzer window:
a. Click on Programs  Xilinx ISE Design Suite  ChipScope Pro  Analyzer.
b. Click on Open Cable Button as shown in Figure 72.
10. Open the ChipScope Pro Analyzer project (see Figure 73):
a. Click File  Open Project.
b. Navigate to the ML605_FMC_XM104_Ibert_Reference_Design folder.
c. Select ml605_fmc_xm104_ibert.cpj.
X-Ref Target - Figure 72
Figure 72: Launch the ChipScope Pro Analyzer Window
X-Ref Target - Figure 73
Figure 73: Open an Existing ChipScope Tool Project in the IBERT Design Package
UG664_49_021810
UG664_50_011710

Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English