Xilinx Virtex-7 VC7203 User Manual

VC7203 GTX Transceiver Characterization Board www.xilinx.com 61
UG957 (v1.3) October 17, 2014
VC7203 Board XDC Listing
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB11_P]
set_property PACKAGE_PIN J27 [get_ports FMC2_HB11_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB11_N]
set_property PACKAGE_PIN M22 [get_ports FMC2_HB12_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB12_P]
set_property PACKAGE_PIN L22 [get_ports FMC2_HB12_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB12_N]
set_property PACKAGE_PIN L25 [get_ports FMC2_HB13_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB13_P]
set_property PACKAGE_PIN L26 [get_ports FMC2_HB13_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB13_N]
set_property PACKAGE_PIN K22 [get_ports FMC2_HB14_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB14_P]
set_property PACKAGE_PIN J22 [get_ports FMC2_HB14_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB14_N]
set_property PACKAGE_PIN M21 [get_ports FMC2_HB15_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB15_P]
set_property PACKAGE_PIN L21 [get_ports FMC2_HB15_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB15_N]
set_property PACKAGE_PIN P21 [get_ports FMC2_HB16_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB16_P]
set_property PACKAGE_PIN N21 [get_ports FMC2_HB16_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB16_N]
#FMC3
set_property PACKAGE_PIN AR20 [get_ports FMC3_PRSNT_M2C_L]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_PRSNT_M2C_L]
set_property PACKAGE_PIN AY18 [get_ports FMC3_CLK0_M2C_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK0_M2C_P]
set_property PACKAGE_PIN AY17 [get_ports FMC3_CLK0_M2C_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK0_M2C_N]
set_property PACKAGE_PIN AW18 [get_ports FMC3_CLK1_M2C_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK1_M2C_P]
set_property PACKAGE_PIN AW17 [get_ports FMC3_CLK1_M2C_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK1_M2C_N]
set_property PACKAGE_PIN H15 [get_ports FMC3_CLK2_BIDIR_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK2_BIDIR_P]
set_property PACKAGE_PIN H14 [get_ports FMC3_CLK2_BIDIR_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK2_BIDIR_N]
set_property PACKAGE_PIN J13 [get_ports FMC3_CLK3_BIDIR_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK3_BIDIR_P]
set_property PACKAGE_PIN H13 [get_ports FMC3_CLK3_BIDIR_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_CLK3_BIDIR_N]
#FMC3 LA
set_property PACKAGE_PIN AP13 [get_ports FMC3_LA00_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA00_CC_P]
set_property PACKAGE_PIN AR13 [get_ports FMC3_LA00_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA00_CC_N]
set_property PACKAGE_PIN AR14 [get_ports FMC3_LA01_CC_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA01_CC_P]
set_property PACKAGE_PIN AT14 [get_ports FMC3_LA01_CC_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA01_CC_N]
set_property PACKAGE_PIN AJ16 [get_ports FMC3_LA02_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA02_P]
set_property PACKAGE_PIN AJ15 [get_ports FMC3_LA02_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA02_N]
set_property PACKAGE_PIN AK14 [get_ports FMC3_LA03_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA03_P]
set_property PACKAGE_PIN AK13 [get_ports FMC3_LA03_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC3_LA03_N]
Send Feedback

Xilinx Virtex-7 VC7203 Specifications

General

FPGA Family	Virtex-7
Transceiver	GTH
GTH Transceivers	16
Maximum Data Rate	13.1 Gbps
Transceivers	16
Maximum Transceiver Speed	13.1 Gbps
Maximum User I/O	600
Process Technology	28nm
Block RAM	38 Mb
Power Supply Voltage	0.9V
Operating Temperature Range	Industrial