Zenith XBR411 - Cpu & Control Register Block Diagram

3-70
4. CPU & Control Register BLOCK DIAGRAM
Flash
Memory
IC301
Flash
Memory
IC301
HD[15:0]
HD[15:0]
BA[21:6]
E5_ALE
BA[5:1,22]
BA[20:1]
FCS0 E5_WEL E5_OE
RST
GEN
Block
RST
GEN
Block
/SRESET
E5_RST
/RST_SMSC
Inverter
IC409
Inverter
IC409
BA[21:20]
IRQ
Video
Contr ol
Block
Video
Contr ol
Block
S_JACK_DET
/BA[ 2 :20]
SMSC_IRQ
AV_RST
/RST_VDEC /RST_VENC /RST_PHY /RST_AUDIO
Connector PN302
Connector PN302Connector PN302 Connector PN302
Connector PN304
Connector PN304Connector PN304 Connector PN304
I/P
D_CONT
VDR_RESET_L
INT_PROG D_CTR S_DET_H
E5 BGA308
E5 BGA308E5 BGA308 E5 BGA308
DMN8602
DMN8602DMN8602 DMN8602
IC 0
IC 0IC 0
IC 0
HD[0:15]
E5_MA[1:5,22:26]
Buffe r IC406
DDR
Memory IC1202
DDR
Memory IC1203
SDRAM_A[15:0]
CLKE,SDRAM_CLK, RAS,CAS,WE
SDRAM_DQS[3:2] SDRAM_DQM[3:2]
SDRAM_DQS[1:0] SDRAM_DQM[1:0]
SDRAM_DQ[15:0]
SDRAM_DQ[31:16]