ZiLOG System 8000 Hardware Reference Manual

HRM Zilog
HRM
The host reads the vector from the controller and clears the
controller's IUS bit. This action ends the interrupt sub-
routine for the host~ The controller clears both the IP and
the BUSY bits and loops while waiting for a new command.
4.5.6. Memory Subsystem Controller: The Memory Subsystem
controller controls up to 4 megabytes of dynamic read-write
memory. The controller can perform read-write operations
wit h bYt e ( 8- bit) , wo r d ( 16- bit), and 10 ng- wo r d ( -3 2- bit)
quantities. Figure 4-10 shows the functional relationship
between the controller and the ZBI and the memory modules
that it controls.
The controller stores data as 32-bit long words and adds to
this, seven bits of information for use by the error-
detection and correction circuits. Figure 4-11 shows tne
overall organization of memory. During memory transactions,
the controller accepts a 24-bit address and the B/W\ and
W!LW\ control signals over the ZBI. The two least-
significant address bits and the B/W and W/LW\ signals
select one of the four bytes at the location to be read or
modified.
4.5.5.1 Byte Translation: During transQctions involving
bytes, the controller receives a data byte from ZBI lines
ADO through AD7. Figure 4-12 shows the flow from a regis-
ter, through the controller, and to memory. The controller
places byte A, the first byte, in location 0 (bits 31 to
24). For this transaction, the bus controller sets both the
B/W\ and W/LW\ control lines high to identify the current
transfer as a byte transfer. The bus controller also places
low levels (0) on ZBI address lines ADOO and AD01 to tell
the memory controller to place byte A in bit positions 31
to 24.
Next, the memory controller places byte B, C, and D in the
succeeding memory locations to fill up the current double
word of memory. The memory controller places the next, the
fifth, byte in the first loca~ion of the next double word of
memory, bits 31 through 24 of byte 4 (not shown).
4.5.5.2 Word Translat~ion: For word (16-bit) translations,
the bus ~ontroller sets line B/W\ low and W!LW\ high. This
code tells the memory controller that the current transfer
is a 16-bit transfer. The bus controller places the 24-bit
address on the ZSI to point to the double-word location in
memory where the memory controll~r is to place the current
t ran s fer. On 1y the ~~ 2 m0 s t- s i g ni fie ant bit s 0 f the ' add res s
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2ilog
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ZiLOG System 8000 Specifications

General

Brand	ZiLOG
Model	System 8000
Category	Desktop
Language	English