ZiLOG System 8000

HRM Zilog
Table 4-26 Device Priority Scheme
HRM
?RIORITY
2
3
4
5
6
7
8
9
10
1 1
PERIPHERAL DEVICE
CTC 0
CTC
CTC 2
SIO 0
SIO
SIO
2
SIO 3
PIO 0
(OFF CPU BOARD I/O)
Winchester Disk
Controller or
SMD Controller
Tape Controller
FUNCTION
Single step, also generates
BAUDO, BAUD1, BAUD2
Generates BAUD3, BAUD4, BAUD5
Generates BAUD6, BAUD7, and
the Real Time Clock
Serial Channels 0,
Serial Channels 2, 3
Serial Channels 4, 5
Serial Channels 6, 7
Line Printer Interface
(Secondary Serial Board)
Vectored interrupts from any of the peripherals, 1 to 8 in
Table 4-26, automatically disables interrupts from lower
priority peripheral devices in the chain. Off-board devices
have· the lowest prior'i ty in the chain.
4-65
Zilog
4-65