ZiLOG System 8000 Hardware Reference Manual

HRM
TEST NAME
Zilog
HRM
ECCTEST - tests of ECC error correction and detection and
ECC memory
PARllMETERS
Parameter 1 = segment -- the segment where the 1-bit and 2-
bit error tests will take place. Default = 1. Range is 1 to
127.
Parameter 2 - offset. The offset where the 1-bit and 2-bit
error test will take place. Default = o. Range is 0 to
FFFC (hex).
Parameter 3 - maxseg. The maximum segment to be tested in
the ECC memory test. Defaul t = 3. Range is 0 to 127. (If
maxseg = 0, however, no ECC memory test will occur.)
DESCRIPTION
ECCTEST is a series of three tests. The series repeats n
times, where n is the number of repetitions specified in the
SADIE test line.
Test 1 tests the ability of the ECC to correct and report
1-bit memory errors. A single-bit error is forced into
memory by writing a 32-bit pattern that is corrupted in one
bit. The correct check byte for the uncorrupted data is
written to the check-byte register. Then error correction
is enabled and the memory location is read. The data read
should match the original, uncorrupted data. If not, an
"uncorrected" error message is displayed. If error correc-
tion occurred, the ECC error count register is checked to be
sure the ECC has recorded the error. If not, and
"unreported" error message appears.
Test 1 repeats 64 K times during each lap. Each repetition
is done using a different data pattern and different cor-
rupted bit.
Test 2 tests the ECC's ability to detect and report 2-bit
errors. A 2-bit error is forced by corrupting any 2-bits in
a 32-bit data pattern ~nd 7-bit check byte. The corrupted
data pattern is written to memory 'and the corrupted check
byte is written to the check byte register. Error detection
is enabled and the System Configuration Register is set so
that ECC errors generate a Non-Maskable Interrupt (NMI).
Then the memory location is read. If no NMI occurs, an
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Zilog
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ZiLOG System 8000 Specifications

General

Brand	ZiLOG
Model	System 8000
Category	Desktop
Language	English