ZOLL PD 2000 - Page 70

FUNCTIONAL DESCRIPTION
The display of data on the CRT is accomplished in two steps. First, The
EPU formats the ECG data and the messages it has received from the
CPU, then loads this data into a display RAM. The CRT gate array
controller will then retrieve this data from RAM and use it to contral the
writing of messages and ECG data on the CRT. The CRT is refreshed
every 16 msec during which 8 msec is used to write 1000 ECG data points
and 8 msec is used to write characters.
In character mode, the controller uses the display RAM data to provide
outputs of: X position, Y position, and intensity for each step that forms a
vector on the CRT monitor. Switch selectable filters on the X and Y DACs
provide the correct compensation for the two modes of operaticn,
character writing and ECG trace. The DAC outputs drive current
amplifiers on the Analog board which control the CRT beam deflection.
Character beam intensity is controlled by modulating a single intensity
bit to form a constant beam brightness independent of the beam speed.
An intensity data byte sets the baseline brightness of the trace by
controlling the CRT cathode voltage.
The baseline intensity is set with one intensity bit. During rapid
transitions the beam appears dimmer and needs an enhancement to
produce a uniform beam intensity. An analog circuit intensifies the beam
during rapid vertical movements. An additional intensity bit is used to
form a bright marker on the ECG trace when an R-wave is detected in the
SYNC mode of machine operation.
Control of the CRT gate array is accomplished by four control lines from
the EPU to the gate array and a bi-directional data bus chip. The EPU can
set an address location for either the CRT RAM or ROM by setting
registers in the gate array using the bi-directional data bus chip (U44).
With the address location set, the bus is used to read or write from either
the ROM (U55) or RAM (U56).
A status line EOMC is returned from the gate array to indicate when a
string of data is completely transferred from memory to the analog
circuits.
Gate Array Functions
The gate array (U52) is designed to operate independent of EPU (U3).
This allows the EPU to service other tasks while the gate array drives the
CRT tube deflection circuits.
To display data on the CRT tube, the gate array program counter is set to
a starting address. When the array starts execution, it sequentially
retrieves control words from memory which are executed until the end of
message (EOMC, U3-30) command is retrieved. The array is halted until
the EPU initiates another execution.
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