Zynq UltraScale+ User Manual

RFSoC Data Converter Evaluation Tool User Guide 47
UG1287 (v2018.2) October 1, 2018 www.xilinx.com
Chapter 6: Software Architecture
Figure 6-2 shows the application execution flow.
X-Ref Target - Figure 6-2
Figure 6-2: Application Execution Flow
GUI
TCP Socket
(Command/Data)
Protocol Layer
Command
Handler
I2C/Clock
Driver
RFdc User Space Driver
DMA Client
Driver
X21254-091318
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Zynq UltraScale+ Specifications

General

Max Transceivers	Up to 32
Transceiver Speed	Up to 32.75 Gbps
Family	Zynq UltraScale+
Processor Cores	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
Max Memory	DDR4
Power Consumption	Varies by configuration, typically 10W to 30W
Operating Temperature	Industrial (-40°C to +100°C), Extended (-40°C to +125°C)
Package Options	Various BGA packages
Category	FPGA SoC