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ABB Relion 670 series - Page 216

ABB Relion 670 series
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INMag
3I0Enable_PG
3I0BLK_PP
Imin
Residualcurrent
basedPhSel.
PP
PE
I3P
V3P
R,Xsettings
PP
PE
Enable
21enable
I_A
R
IPELm
PickupIph
Pickup_N
50/51enable
Relativecurrent
basedPPrelease
detection
IPELm
OR
RELPHLmn
AND
STZPHLmn
STZPHLm
LEPHLm
LEPHLmn
OR
IRELPE
IRELPP
OR
AND
AND
AND
AND
PHSLmn
PHSLm
b1b3
T
F
PHSELZ
DLECND
63
PHPH_FLT
PHG_FLT
b4b6
word
Binarytoword
Binarytoword
b1b3
b4b6
word
Setlevel
R
X
ANSI18000010-1-en.vsdx
m=AG,BG,CG
mn=AB,BC,CA
ANSI18000010 V1 EN-US
Figure 91: General phase-selection logic diagram
Figure 92 presents schematically the creation of the phase-to-phase and phase-to-ground
operating conditions. Consider only the corresponding part of measuring and logic circuits, when
only a phase-to-ground or phase-to-phase measurement is available within the IED.
ANSI09000149-4-en.vsd
AND
AND
AND
Bool to
integer
DLECND
STPG
STPP
IRELPG
IRELPP
BLOCK
AND
0
20ms
0
10ms
0
15ms
0
15ms
0
3IIMinPUPG
0max
30 _
3
100
IBLK PP
IIph
0
30.5IIMinPUPG
0
30 _
3
100
max
I Enable PG
IIph
21 enable
LDEblock
AND
ANSI09000149 V4 EN-US
Figure 92: Phase-to-phase and phase-to-ground operating conditions (residual current
criteria)
A special attention is paid to correct phase selection at evolving faults. A DLECND output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure
92. This signal can be configured to STCND functional input signals of the distance
Section 7 1MRK 502 066-UUS B
Impedance protection
210
Technical manual

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