ADLINK Technology arm AMPERE COM-HPC-ALT - Block Diagram

COM-HPC-ALT User’s Guide PICMG COM-HPC R1.0
Page 20 Copyright © 2023 ADLINK Technology, Inc.
3. Block Diagram
Figure 1 – Module Function Block Diagram
BCM57502
DIMM
3200 MT/s
DIMM
3200 MT/s
DIMM
3200 MT/s
DIMM
3200 MT/s
DIMM
3200 MT/s
DIMM
3200 MT/s
PCIe Lane 16-31
PCIe Lane 32-47
PCIe Lane 48-63
ETH_Sidebands
Rapid Shutdown
Ampere Computing
Altra
1 x4, 2 x2
1 x4, 2 x2
1 x16, 2 x8, 4 x4
J1 J2
2 x2, 1 x4
2 x2, 1 x4
(Root Complex B)
PCIe Lane 0-3
PCIe Lane 4-7
PCIe Lane 8-11
PCIe Lane 12-15
PCIe_BMC x1
ETH_KR 0-3
ETH_KR 4-7
4x USB 3.x/2.0 0-3
4x USB 2.0 4-7
SATA Port 0-1
NBASE-T 0
BOOT_SPI
GPP_SPI
SMBus
I2C 0
(w/ ALERT#)
I2C 1
UART 0
UART 1
GPIO x12
USB_PD_
IPMB
eSPI
GROUP 0 Low
GROUP 0 High
GROUP 1
GROUP 2
GROUP 3
BIOS
EEPROM
(Root Complex B) (Root Complex A)
1 x16, 2 x8, 4 x4
(Root Complex A)
1 x16, 2 x8, 4 x4
(Root Complex A)
uPD720201
LAN
Intel i210
TPM
HSUART
PCIe x8
Sensor for monitoring
voltage/c ur rent/tem p
Discrete
(power
sequence)
PCIe x1
I2C_9
can be x8
can be x8
Note:
-All the PCIe are Gen4
-I2C_9 from Altra SOC supports CCIX mode code (ready now) or general purpose SMBUS mode code (TBC), either one
-UART_1: TX, RX come from SOC, RTS#, CTS# are simulated by SOC GPIO
-USB_PD_I2C, MMC, SOC: connect together
-need work with AST2500 Remote BMC on carrier
MMC
ATMEGA
HSUART
HSUART
UART_1 RTS#, CTS# simulated by GPIO