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ADLINK Technology arm AMPERE COM-HPC-ALT - Asynchronous Serial Port

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COM-HPC-ALT User’s Guide PICMG COM-HPC R1.0
Page 20 Copyright © 2023 ADLINK Technology, Inc.
These ports shall be used in conjunction with the
corresponding USB 2.0 port pair (e.g. USB2_SSxxx+/-
shall be used with the USB2 USB 2.0 pair and
USB3_SSxxx+/- with the USB3 USB 2.0 pair).
USB01_OC#
USB23_OC#
USB45_OC#
USB67_OC#
B28
B27
B26
B25
USB over-current sense, USB channels 0,1; channels
2,3; channels 4,5 and channels 6,7 respectively.
A pull-up for each of these lines to the 3.3V Suspend
rail shall be present on the Module.
The pull-up should be 10K. An open drain driver
from USB current monitors on the Carrier Board may
drive this line low. The Carrier Board shall not pull
these lines up.
Note that the over-current limits for USB 2.0 and USB
3.0 are different; this is a Carrier board
implementation item.
I 3.3VSB
PU 10K
3.3VSB
Do not pull high on carrier
RSMRST_OUT#
USB devices that are to be powered in the S5 / S4 /
S3 Suspend states should not have their 5V VBUS
power enabled before RSMRST_OUT# transitions to
the hi state.
RSMRST_OUT# is also described in Power and System
Management section
O
3.3VSB
This platform doesn’t support USB4, thus additional signals required by USB4 are not shown here.
4.3.5 Asynchronous Serial Port
Two logic level Module “5 wire” (TX, RX, RTS#, CTS#, GND) asynchronous serial ports are provided for general purpose use and for use with debugging
software that make use of the “console redirect” features available in many BIOS and operating systems. The Module BIOS should support “console
redirect” to the UART0 port.
It is preferred that if the Module is based on an Intel x86 architecture, the Module serial ports be I/O mapped and be register compatible with the
National Semiconductor 16550 UARTs that were used in the PC AT architecture.

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