ADLINK Technology arm AMPERE COM-HPC-ALT - Page 48

COM-HPC-ALT User’s Guide PICMG COM-HPC R1.0
Page 19 Copyright © 2023 ADLINK Technology, Inc.
USB2-
USB3+
USB3-
C17
C15
C14
If any SuperSpeed ports are implemented, then they
must be supported by a USB 2.0 port, using one of
the USB[0:3] ports from this pool.
USB0_SSTX0+
USB0_SSTX0-
USB1_SSTX0+
USB1_SSTX0-
D44
D43
D38
D37
Four sets of SuperSpeed transmit pairs, used to
realize the transmit side of two USB 3.2 Gen 2x2
ports.
Alternatively, USB 3.2 Gen 1 or Gen 2 ports (single TX
pair, single RX pair per port) may be implemented
using a portion of this interface.
These ports shall be used in conjunction with the
corresponding USB 2.0 port pair (e.g. USB0_SSxxx+/-
shall be used with the USB0 USB 2.0 pair and so on,
USB1_SSxxx+/- with the USB1 USB 2.0 pair).
O PCIe
AC coupled on Module
This product only support USB0-3 (up to USB 3.2 Gen1)
through a PCIe to USB IC
USB0_SSRX0+
USB0_SSRX0-
USB1_SSRX0+
USB1_SSRX0-
C45
C44
C39
C38
Four sets of SuperSpeed receive pairs, used to realize
the transmit side of two USB 3.2 Gen 2x2 ports.
Alternatively, USB 3.2 Gen 1 or Gen 2 ports (single TX
pair, single RX pair per port) may be implemented
using a portion of this interface.
These ports shall be used in conjunction with the
corresponding USB 2.0 port pair (e.g. USB0_SSxxx+/-
shall be used with the USB0 USB 2.0 pair and so on,
USB1_SSxxx+/- with the USB1 USB 2.0 pair).
I PCIe
AC coupled off Module
This product only support USB0-3 (up to USB 3.2 Gen1)
through a PCIe to USB IC
USB2_SSTX+
USB2_SSTX-
USB3_SSTX+
USB3_SSTX-
D35
D34
D32
D31
Two sets of high speed transmit pairs, to realize two
USB 3.2 Gen 1 or Gen 2 implementations.
These ports shall be used in conjunction with the
corresponding USB 2.0 port pair (e.g. USB2_SSxxx+/-
shall be used with the USB2 USB 2.0 pair and
USB3_SSxxx+/- with the USB3 USB 2.0 pair).
O PCIe
AC coupled on Module
This product only support USB0-3 (up to USB 3.2 Gen1)
through a PCIe to USB IC
USB2_SSRX+
USB2_SSRX-
USB3_SSRX+
USB3_SSRX-
C36
C35
C33
C32
Two sets of high speed receive pairs, to realize two
USB 3.2 Gen 1 or Gen 2 implementations.
I PCIe
AC coupled off Module
This product only support USB0-3 (up to USB 3.2 Gen1)
through a PCIe to USB IC