Alinx AXKU040 - Part 16: Keys

KINTEX UltraScale+ FPGA Board AXKU040 User Manual
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Part 16: Keys
The AXKU040 FPGA development board contains two user Keys and 1
reset key. Two user keys are connected to the IO of FPGA BANK65.The user
key is active at low level to realize some functions of the board for customers;
The reset key is connected to FPGA BANK64 for system reset.
The circuit of user key part is shown in Figure 16-1.
Figure 16-1: Keys Schematic
Keys Pin Assignment
Signal Name
FPGA Pin
FPGA Pin
Number
Description
KEY1
IO_L13N_T2L_N1_GC_QBC_44
K21
User Key Input
KEY2
IO_L24P_T3U_N10_EMCCLK_65
K20
User Key Input
FPGA_RSETn
IO_L24P_T3U_N10_64
AK8
System Reset