Alinx AXKU040 - Part 3: DDR4 DRAM

KINTEX UltraScale+ FPGA Board AXKU040 User Manual
10 / 59
www.alinx.com
Part 3: DDR4 DRAM
The AXKU040 FPGA development board is equipped with four Micron
1GB DDR4 chips, model MT40A512M16LY-062EIT. Four DDR4 SDRAMs
form a 64-bit bus width. Because four DDR4 chips are connected to the FPGA,
the DDR4 SDRAM can run at speeds up to 1200MHz, and four DDR4 memory
systems are directly connected to the BANK44, BANK45, and BANK46
interfaces of the FPGA. The specific configuration of DDR4 SDRAM is shown
in Table 3-1.
Bit Number
Chip Model
Capacity
Factory
U45,U47,U48,U49
MT40A512M16LY-062EIT
512M x 16bit
Micron
Table 3-1: DDR4 SDRAM Configuration
The hardware design of DDR4 requires strict consideration of
signal integrity. We have fully considered the matching resistor/terminal
resistance, trace impedance control, and trace length control in circuit
design and PCB design to ensure high-speed and stable operation of
DDR3.
Figure 3-1: The DDR4 DRAM Schematic