Alinx AXKU040 - Page 11

KINTEX UltraScale+ FPGA Board AXKU040 User Manual
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4 DDR4 DRAM pin assignments:
Signal Name
FPGA Pin Name
FPGA Pin
PL_DDR4_DQ0
IO_L3N_T0L_N5_AD15N_44
AE20
PL_DDR4_DQ1
IO_L2N_T0L_N3_44
AG20
PL_DDR4_DQ2
IO_L2P_T0L_N2_44
AF20
PL_DDR4_DQ3
IO_L5P_T0U_N8_AD14P_44
AE22
PL_DDR4_DQ4
IO_L3P_T0L_N4_AD15P_44
AD20
PL_DDR4_DQ5
IO_L6N_T0U_N11_AD6N_44
AG22
PL_DDR4_DQ6
IO_L6P_T0U_N10_AD6P_44
AF22
PL_DDR4_DQ7
IO_L5N_T0U_N9_AD14N_44
AE23
PL_DDR4_DQ8
IO_L8N_T1L_N3_AD5N_44
AF24
PL_DDR4_DQ9
IO_L11P_T1U_N8_GC_44
AJ23
PL_DDR4_DQ10
IO_L8P_T1L_N2_AD5P_44
AF23
PL_DDR4_DQ11
IO_L12N_T1U_N11_GC_44
AH23
PL_DDR4_DQ12
IO_L9N_T1L_N5_AD12N_44
AG25
PL_DDR4_DQ13
IO_L11N_T1U_N9_GC_44
AJ24
PL_DDR4_DQ14
IO_L9P_T1L_N4_AD12P_44
AG24
PL_DDR4_DQ15
IO_L12P_T1U_N10_GC_44
AH22
PL_DDR4_DQ16
IO_L14P_T2L_N2_GC_44
AK22
PL_DDR4_DQ17
IO_L17P_T2U_N8_AD10P_44
AL22
PL_DDR4_DQ18
IO_L15N_T2L_N5_AD11N_44
AM20
PL_DDR4_DQ19
IO_L17N_T2U_N9_AD10N_44
AL23
PL_DDR4_DQ20
IO_L14N_T2L_N3_GC_44
AK23
PL_DDR4_DQ21
IO_L18N_T2U_N11_AD2N_44
AL25
PL_DDR4_DQ22
IO_L15P_T2L_N4_AD11P_44
AL20
PL_DDR4_DQ23
IO_L18P_T2U_N10_AD2P_44
AL24
PL_DDR4_DQ24
IO_L20P_T3L_N2_AD1P_44
AM22
PL_DDR4_DQ25
IO_L23P_T3U_N8_44
AP24
PL_DDR4_DQ26
IO_L20N_T3L_N3_AD1N_44
AN22
PL_DDR4_DQ27
IO_L21N_T3L_N5_AD8N_44
AN24
PL_DDR4_DQ28
IO_L24P_T3U_N10_44
AN23
PL_DDR4_DQ29
IO_L23N_T3U_N9_44
AP25
PL_DDR4_DQ30
IO_L24N_T3U_N11_44
AP23
PL_DDR4_DQ31
IO_L21P_T3L_N4_AD8P_44
AM24
PL_DDR4_DQ32
IO_L2P_T0L_N2_46
AM26
PL_DDR4_DQ33
IO_L6P_T0U_N10_AD6P_46
AJ28