Technical Data P54x/EN TD/La4
MiCOM P543, P544, P545 & P546
(TD) 2-21
TD
V>2 Time Delay: 0.00…100.00 s
V1>1 Cmp Funct:
Disabled
DT
IDMT
V1>1 Cmp Vlt Set: 60…110 V
V1>1 Cmp Tim Dly: 0.00…100.00 s
V1>1 CmpTMS: 0.5…100.0
V1>2 Cmp Status: Disabled/Enabled
V1>2 Vlt Set: 60…110 V
V1>2 CmpTim Dly: 0.00…100.00 s
Underfrequency protection
F<1 Status: Disabled/Enabled
F<1 Setting: 45.00…65.00 Hz
F<1 Time Delay: 0.00…100.00 s
F<2 Status
(up to):
F<4 Time Delay
All settings and options chosen from the
same ranges as per the 1st stage
F< Function Link:
Binary function link string, selecting which
frequency elements (stages 1 to 4) will be
blocked by the pole-dead logic
Overfrequency protection
F>1 Status: Disabled/Enabled
F>1 Setting: 45.00…65.00Hz
F>1 Time Delay: 0.00…100.00s
F>2 Status
(up to):
F>2 Time Delay
All settings and options chosen from the
same ranges as per the 1st stage
Rate-of-change of frequency
protection
(df/dt protection)
df/dt Avg. Cycles: 6…12
df/dt>1 Status: Disabled/Enabled
df/dt>1 Setting: 0.1…10.0 Hz
df/dt>1 Dir’n.: Negative/Positive/Both
df/dt>1 Time: 0.00…100.00 s
df/dt>2 Status:
(up to):
df/dt>4 Time
All settings and options chosen from the same
ranges as per the 1st stage.
Circuit breaker fail
CB Fail 1 Status: Disabled/Enabled
CB Fail 1 Timer: 0.00…10.00 s
CB Fail 2 Status: Disabled/Enabled
CB Fail 2 Timer: 0.00…10.00 s
Volt Prot Reset:
I< Only
CB Open & I<
Prot Reset & I<
Ext Prot Reset:
I< Only
CB Open & I<
Prot Reset & I<
WI Prot Reset: Disabled/Enabled
Undercurrent
I< Current Set: 0.02…3.20 In
ISEF< Current Set: 0.001…0.8 In
SEF
Poledead
V< : 10 …40 V
Supervision
VT Supervision
VTS Mode: Measured + MCB, Measured Only
or MCB Only
VTS Status: Disabled/Blocking/Indication
VTS Reset Mode: Manual/Auto
VTS Time Delay: 1 s...10 s
VTS I> Inhibit: 0.08....32 x In
VTS I2> Inhibit: 0.05...0.5 x In
Inrush Detection
I> 2nd Harmonic: 10%...100%
Weak Infeed Blk
WI Inhibit: Disabled/Enabled
I0/I2 Setting: 2...3
CTS Mode: Disabled, Standard, I Diff, Idiff +
Standard
CTS Status: Restrain, Indication,
CTS Reset Mode: Manual or Auto
CTS Time Delay: 0...10 s
CTS VN< Inhibit: 0.5 V...22 V
CTS i1>: 0.05*In...4.0*In
CTS i2/i1>: 0.05...1
CTS i2/i1>>: 0.05...1
Systems check
Bus-Line Synchronism and Voltage Checks
(System Checks)
P543 and P545 system checks:
Voltage Monitors
Live Voltage: 1.0…132.0 V
Dead Voltage: 1.0…132.0 V
Synchrocheck (Check Synch)
CS1 Status: Disabled/Enabled
CS1 Phase Angle: 0…90°
CS1 Slip Control:
None
Timer
Frequency
Both
CS1 Slip Freq: 0.02…1.00 Hz
CS1 Slip Timer: 0.0…99.0 s
CS2 Status
(up to):
CS2 Slip Timer
All settings and options chosen from the same
ranges as per the first stage CS1 element.
CS Undervoltage: 10.0…132.0 V
CS Overvoltage: 60.0…185.0 V
CS Diff Voltage: 1.0…132.0 V
CS Voltage Block:
None
Undervoltage
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