Alstom SHPM 101 - Page 150

SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Appendix A
Page 14 of 71
Figure 14: Zone 1/Zone 2 comparators (Quad version)
In alarm
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
1
(V – IZ)AZ1
INR
Comparator AZ1
Comparator ABZ1
Side line inhibit ZA
(V – IZ)ABZ1
(V – IR)A
V POL AB
V POL A
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
(V – IZ)AZ2
–IABZPH
Comparator AZ1
Comparator ABZ2
(V – IZ)ABZ2
(V – IR)A
V POL C
IAR
V POL BC
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
1
Comparator BZ1
Comparator BCZ1
Side line inhibit ZB
(V – IZ)BCZ1
(V – IR)B
(V – IZ)BZ1
V POL B
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
Comparator BZ2
Comparator BCZ2
(V – IZ)BCZ2
(V – IR)B
(V – IZ)BZ2
–IBCZPH
IBR
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
1
Comparator CZ1
Comparator CAZ1
Side line inhibit ZC
(V – IZ)CZ1
(V – IR)C
(V – IZ)CZ1
1 2 3
A1
B1
DA1
DB1
Dout1
ULA
INH
Out
1
Out
2
Dout2
A2
B2
DA2
DB2
INH9
Comparator CZ2
Comparator CAZ2
(V – IZ)CAZ2
(V – IR)C
(V – IZ)CZ2
–ICAZPH
ICR
V POL CA
MCK/4
MCK/8
÷4
÷8
÷5
Clock
monitor
circuit
Main clock
100kHz
at 50Hz
MCK
MCK/5
LD alarm
Power swing block Z1
Power swing block Z2
Self check
Master reset/revert
Distable comparators
Inhibits
and
control
–IAZPH
–IBZPH
–ICZPH
VMA
VMB
VMC
Memory
select
Z1/Z2
polarising
+12V
+5V
0V
GA
G T/line
PDA
Pole dead
A
LH S/line
A
RH S/line
A
Direction
Guard
zone
logic
Inhibit
Inhibit
Inhibit
GB
G T/line
PDB
Pole dead
B
LH S/line
B
RH S/line
B
Direction
Guard
zone
logic
Inhibit
Inhibit
Inhibit
GC
G T/line
PDC
Pole dead
C
LH S/line
C
RH S/line
C
Direction
Guard
zone
logic
Inhibit
Inhibit
Inhibit
Memory
enable
VA
VB
VC
Signal
common
–12V